Array substrate and display device

US11670645B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11670645-B2
Application numberUS-202017051200-A
CountryUS
Kind codeB2
Filing dateMar 3, 2020
Priority dateMar 15, 2019
Publication dateJun 6, 2023
Grant dateJun 6, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present disclosure provides an array substrate and a display device. The array substrate includes a base substrate; a signal transmission line on the base substrate; at least one electrostatic discharging device and an electrostatic discharging signal line coupled to each other and located at a non-display region of the base substrate. The at least one electrostatic discharging device is configured to discharge static electricity generated in the array substrate. The signal transmission line is coupled with the at least one electrostatic discharging device through at least two branch circuits.

First claim

Opening claim text (preview).

What is claimed is: 1. An array substrate, comprising: a base substrate; a signal transmission line on the base substrate; and at least one electrostatic discharging device and an electrostatic discharging signal line coupled to each other and located at a non-display region of the base substrate, the at least one electrostatic discharging device being configured to discharge static electricity generated in the array substrate, wherein the signal transmission line is coupled with the at least one electrostatic discharging device through at least two branch circuits, the array substrate further comprises at least one electrostatic discharging unit in the non-display region of the base substrate and in one-to-one correspondence with the at least one electrostatic discharging device, wherein each of the at least one electrostatic discharging unit comprises a first electrode layer, an intermediate layer on a side of the first electrode layer distal to the base substrate, and a second electrode layer on a side of the intermediate layer distal to the base substrate, each of the at least one electrostatic discharging device comprises a gate electrode layer, a gate insulating layer on a side of the gate electrode layer distal to the base substrate, an active layer on a side of the gate insulating layer distal to the base substrate, and a source electrode and a drain electrode respectively coupled to the active layer, with the gate electrode layer, the gate insulating layer, the active layer being sequentially disposed on the base substrate, a first electrode layer of one electrostatic discharging unit is coupled with a source electrode of a corresponding electrostatic discharging device through a first via hole, and the first electrode layer of the electrostatic discharging unit is coupled with a gate electrode layer of the corresponding electrostatic discharging device through a second via hole. 2. The array substrate according to claim 1 , wherein the at least one electrostatic discharging device comprises a first electrostatic discharging device configured to transmit static electricity on the signal transmission line to the electrostatic discharging signal line for discharging the static electricity, the at least one electrostatic discharging unit comprises a first electrostatic discharging unit corresponding to the first electrostatic discharging device, the first electrostatic discharging unit being configured to discharge the static electricity on the signal transmission line through a second electrode layer of the first electrostatic discharging unit. 3. The array substrate according to claim 2 , wherein a gate electrode layer and a source electrode of the first electrostatic discharging device are coupled with the signal transmission line, a drain electrode of the first electrostatic discharging device is coupled with the electrostatic discharging signal line, and a first electrode layer of the first electrostatic discharging unit is coupled with the signal transmission line. 4. The array substrate according to claim 2 , wherein the at least one electrostatic discharging device further comprises a second electrostatic discharging device configured to transmit the static electricity on the electrostatic discharging signal line to the signal transmission line for discharging the static electricity, and the at least one electrostatic discharging unit further comprises a second electrostatic discharging unit corresponding to the second electrostatic discharging device, the second electrostatic discharging unit being configured to discharge the static electricity on the electrostatic discharging signal line through a second electrode layer of the second electrostatic discharging unit. 5. The array substrate according to claim 4 , wherein a gate electrode layer and a source electrode of the second electrostatic discharging device are coupled with the electrostatic discharging signal line, a drain electrode of the second electrostatic discharging device is coupled with the signal transmission line, and a first electrode layer of the second electrostatic discharging unit is coupled with the electrostatic discharge signal line. 6. The array substrate according to claim 1 , wherein the first electrode layer is an anode layer, the intermediate layer comprises at least one of a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer and an electron injection layer, and the second electrode layer is a cathode layer. 7. The array substrate according to claim 1 , wherein the signal transmission line is a gate line or a data line, and the electrostatic discharging signal line is a short-circuit ring. 8. A display device comprising the array substrate according to claim 1 . 9. A display device comprising the array substrate according to claim 2 . 10. A display device comprising the array substrate according to claim 3 . 11. A display device comprising the array substrate according to claim 4 . 12. A display device comprising the array substrate according to claim 5 . 13. An array substrate, comprising: a base substrate; a signal transmission line on the base substrate; a first electrostatic discharging device and an electrostatic discharging signal line coupled to each other and located at a non-display region of the base substrate, the first electrostatic discharging device being configured to discharge static electricity generated in the array substrate; and a first electrostatic discharging unit in the non-display region of the base substrate and in one-to-one correspondence with the first electrostatic discharging device, wherein the signal transmission line is coupled to the first electrostatic discharging devices through two branch circuits, connection terminals at which the two branch circuits are coupled to the electrostatic discharging device are respectively at opposite sides of the electrostatic discharging device, and a connecting point at which the two branch circuits are coupled to each other and the electrostatic discharging device are respectively at two ends of a high incidence position of electrostatic breakdown in the two branch circuits, the first electrostatic discharging unit comprises: a first electrode layer, an intermediate layer on a side of the first electrode layer distal to the base substrate, and a second electrode layer on a side of the intermediate layer distal to the base substrate, the first electrostatic discharging device comprises: a gate electrode layer, a gate insulating layer on a side of the gate electrode layer distal to the base substrate, an active layer on a side of the gate insulating layer distal to the base substrate, and a source electrode and a drain electrode respectively coupled to the active layer, with the gate electrode layer, the gate insulating layer, the active layer being sequentially disposed on the base substrate, a first electrode layer of the first electrostatic discharging unit is coupled with a source electrode of the first electrostatic discharging device through a first via hole, and the first electrode layer of the first electrostatic discharging unit is coupled with a gate electrode layer of the first electrostatic discharging device through a second via hole, a gate electrode layer and a source electrode of the first electrostatic discharging device are coupled with the signal transmission line, a drain electrode of the first electrostatic discharging device is coupled with the electrostatic discharging signal line, and a first electrode layer of the first electrostatic discharging unit is coupled with

Assignees

Inventors

Classifications

  • Arrangements to prevent high voltage or static electricity failures · CPC title

  • wherein the TFTs are in active matrices · CPC title

  • H10D89/911Primary

    using passive elements as protective elements · CPC title

  • Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] · CPC title

  • adapted for preventing breakage, peeling or short circuiting · CPC title

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What does patent US11670645B2 cover?
The present disclosure provides an array substrate and a display device. The array substrate includes a base substrate; a signal transmission line on the base substrate; at least one electrostatic discharging device and an electrostatic discharging signal line coupled to each other and located at a non-display region of the base substrate. The at least one electrostatic discharging device is co…
Who is the assignee on this patent?
Beijing Boe Display Tech Co, Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10D89/911. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 06 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).