Display device having data driver with reduced signal noise

Patent metadata

Field	Value
Publication number	US-11670237-B2
Application number	US-202017092966-A
Country	US
Kind code	B2
Filing date	Nov 9, 2020
Priority date	Mar 16, 2020
Publication date	Jun 6, 2023
Grant date	Jun 6, 2023

Abstract

A display device includes a display unit, a scan driver, and a data driver. The display unit includes pixels coupled to scan lines, sensing scan lines, data lines, and sensing lines. The scan driver supplies a scan signal to the scan lines, and supplies a sensing scan signal to the sensing scan lines. The data driver supplies an image data voltage to the data lines, and detects sensing values of the pixels on a pixel column basis through the sensing lines during a sensing period. The data driver includes an analog-to-digital converter which converts the detected sensing values into digital data during the sensing period and outputs sensing data. The analog-to-digital converter pauses the detection of the sensing values during a first period of the sensing period.

First claim

What is claimed is:

1. A display device comprising:
a display unit including pixels coupled to scan lines, sensing scan lines, data lines, and sensing lines;
a scan driver which supplies a scan signal to the scan lines, and supplies a sensing scan signal to the sensing scan lines; and
a data driver which supplies an image data voltage to the data lines, and detects sensing values of the pixels on a pixel column basis through the sensing lines during a sensing period,
wherein the data driver comprises an analog-to-digital converter which converts the detected sensing values into digital data during the sensing period and outputs sensing data,
wherein the analog-to-digital converter pauses the detection of the sensing values during a first period of the sensing period, and detects the sensing values in a second period of the sensing period,
wherein the data driver further comprises a clock generator which sequentially outputs a plurality of sensing clocks,
wherein the analog-to-digital converter outputs the sensing data based on the sensing clocks, and
wherein the clock generator pauses the output of the sensing clocks during the first period.

2. The display device according to claim 1 , further comprising a timing controller which transmits image data in which a clock is embedded to the data driver,
wherein the data driver further comprises a clock recovery circuit which extracts the clock from the image data, and
wherein the clock generator generates the sensing clocks by dividing the clock extracted from the image data.

3. The display device according to claim 1 ,
wherein the scan driver simultaneously supplies the scan signal to scan lines corresponding to k pixel rows among the scan lines in the second period of the sensing period, k being a natural number greater than 1, and
wherein the data driver supplies a low gray scale data voltage to the data lines in the second period.

4. The display device according to claim 3 , wherein the first period overlaps with the second period.

5. The display device according to claim 4 , wherein the data driver further comprises an output circuit electrically coupled to the sensing lines and which provides the sensing values to the analog-to-digital converter on the pixel column basis.

6. The display device according to claim 5 ,
wherein the output circuit comprises a plurality of sub-output circuits electrically coupled to the sensing lines, respectively, and
wherein the sub-output circuits sequentially provide the sensing values to the analog-to-digital converter in response to the sensing clocks, respectively.

7. The display device according to claim 6 , further comprising a timing controller which provides a sensing pause signal to the data driver,
wherein the clock generator pauses the output of the sensing clocks based on the sensing pause signal.

8. The display device according to claim 7 ,
wherein the sensing pause signal comprises a first sub-sensing pause signal and a second sub-sensing pause signal, and
wherein, in the second period, the timing controller generates the first sub-sensing pause signal based on a rising edge of the scan signal, and generates the second sub-sensing pause signal based on a falling edge of the scan signal.

9. The display device according to claim 8 , wherein the clock generator pauses the output of the sensing clocks in synchronization with a rising edge of the first sub-sensing pause signal, and re-outputs the sensing clocks in synchronization with a falling edge of the second sub-sensing pause signal.

10. The display device according to claim 8 , wherein the clock generator pauses the output of the sensing clocks in synchronization with a rising edge of the first sub-sensing pause signal, and re-outputs the sensing clocks in synchronization with a rising edge of the second sub-sensing pause signal.

11. The display device according to claim 5 ,
wherein the output circuit provides a sensing value corresponding to a j-th sensing line to the analog-to-digital converter before the first period starts, j being a natural number greater than 1, and
wherein the output circuit supplies a sensing value corresponding to a j+1-th sensing line to the analog-to-digital converter after the first period.

12. The display device according to claim 11 , wherein, during the first period, the output circuit does not supply the sensing values to the analog-to-digital converter.

13. The display device according to claim 11 , wherein, during the first period, the analog-to-digital converter pauses the output of the sensing data.

14. The display device according to claim 3 , wherein the low gray scale data voltage is an image data voltage corresponding to a black gray scale.

15. The display device according to claim 3 , wherein the scan lines corresponding to the k pixel rows are successively arranged.

16. A display device comprising:
a display unit including pixels coupled to scan lines, sensing scan lines, data lines, and sensing lines;
a scan driver which supplies a scan signal to the scan lines, and supplies a sensing scan signal to the sensing scan lines; and
a data driver which supplies an image data voltage to the data lines, and detects sensing values of the pixels on a pixel column basis through the sensing lines during a sensing period,
wherein the data driver comprises an analog-to-digital converter which converts the detected sensing values into digital data during the sensing period and outputs sensing data,
wherein the analog-to-digital converter pauses the detection of the sensing values during a first period of the sensing period,
wherein the data driver further comprises a clock generator which sequentially outputs a plurality of sensing clocks,
wherein the analog-to-digital converter outputs the sensing data based on the sensing clocks, and
wherein the clock generator pauses the output of the sensing clocks during the first period.

Assignees

• Samsung Display Co Ltd

Inventors

• Min Jung Ki
• Lee Wook
• Yeo Sang Jae

Classifications

• G09G3/3266 Primary

  Details of drivers for scan electrodes · CPC title

• G09G2300/0828

  forming a digital to analog [D/A] conversion circuit · CPC title

• G09G2370/08

  Details of image data interface between the display device controller and the data line driver circuit · CPC title

• G09G2320/0295

  by monitoring each display pixel · CPC title

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title