Out-of-band custom baseboard management controller (BMC) firmware stack monitoring system and method

Patent metadata

Field	Value
Publication number	US-11669336-B2
Application number	US-202117346721-A
Country	US
Kind code	B2
Filing date	Jun 14, 2021
Priority date	Jun 14, 2021
Publication date	Jun 6, 2023
Grant date	Jun 6, 2023

Abstract

An Information Handling System (IHS) includes multiple hardware devices, and a baseboard Management Controller (BMC) in communication with the plurality of hardware devices. The BMC includes executable instructions for monitoring a parameter of one or more of the hardware devices of the IHS when a custom BMC firmware stack is executed on the BMC. The instructions that monitor the parameter are separate and distinct from the instructions of the custom BMC firmware stack. When the parameter exceeds a specified threshold, the instructions are further executed to control the BMC to perform one or more operations to remediate the excessive parameter.

First claim

The invention claimed is:

1. An Information Handling System (IHS), comprising:
a plurality of hardware devices; and
a Baseboard Management Controller (BMC) in communication with the plurality of hardware devices, the BMC comprising:
a first processor in communication with a first memory unit; and
a second memory unit storing instructions that are executable by a second processor to:
detect whether a standard BMC firmware stack or a custom BMC firmware stack is executed on the first processor, wherein the custom BMC firmware stack has been implemented by an entity that is separate and distinct from a vendor of the IHS;
when the custom BMC firmware stack is executed on the first processor, monitor a parameter of one or more of the hardware devices of the IHS; and
when the parameter exceeds a specified threshold, perform one or more operations to remediate the excessive parameter.

2. The IHS of claim 1 , wherein the instructions are further executed to detect when the custom BMC firmware stack is booted on the first processor, and commence monitoring of the parameter in response to the detection.

3. The IHS of claim 1 , wherein the first processor comprises a baseboard processor and the second processor comprises a coprocessor in communication with the baseboard processor.

4. The IHS of claim 3 , wherein the instructions are further executed to perform at least one of restricting access to the second memory unit used by the first processor, and restricting control over the coprocessor by the custom BMC firmware stack.

5. The IHS of claim 1 , wherein the instructions are further executed to remediate the excessive parameter by controlling a fan speed of one or more fans configured in the IHS.

6. The IHS of claim 5 , wherein the instructions are further executed to:
acquire one or more additional parameters of one or more of the hardware devices;
calculate a desired fan speed setting according to one or more of the acquired parameters; and
set the fan at the desired fan speed.

7. The IHS of claim 6 , wherein the instructions are further executed to set the fan at the desired fan speed only when the desired fan speed is greater than the current fan speed.

8. The IHS of claim 1 , wherein the instructions are further executed to remediate the excessive parameter by controlling access to a memory storage component of the BMC by the custom BMC firmware stack, wherein the memory storage component comprises the first and second memory units.

9. The IHS of claim 8 , wherein the memory storage component comprises at least one of an electronic multimedia card (eMMC), an electronic universal flash storage (eUFS), or a low-power double data rate (LPDDR) memory device.

10. The IHS of claim 1 , wherein the instructions are further executed to remediate the excessive parameter by locking the BIOS of the IHS in a user input mode.

11. The IHS of claim 1 , wherein the instructions are further executed to remediate the excessive parameter by writing a warning message to a shared memory location of the BMC, wherein the custom BMC firmware stack is configured to read the warning message from the shared memory location and display the warning message for view by a user.

12. A method comprising:
providing Baseboard Management Controller (BMC) in communication with a plurality of hardware devices of an information handling system (IHS);
when a custom BMC firmware stack is executed on a first processor of the BMC, monitoring, by a second processor of the BMC, a parameter of one or more of the hardware devices of the IHS, wherein the instructions that monitor the parameter are separate and distinct from the instructions of the custom BMC firmware stack, and wherein the custom BMC firmware stack has been implemented by an entity that is separate and distinct from a vendor of the IHS; and
when the parameter exceeds a specified threshold, controlling, by the second processor, the BMC to perform one or more operations to remediate the excessive parameter.

13. The method of claim 12 , further comprising performing at least one of restricting access to the memory units used by the coprocessor, and restricting control over the coprocessor by the custom BMC firmware stack.

14. The method of claim 12 , further comprising remediating the excessive parameter by controlling a fan speed of one or more fans configured in the IHS.

15. The method of claim 14 , further comprising:
acquiring one or more additional parameters of one or more of the hardware devices;
calculating a desired fan speed setting according to one or more of the acquired parameters; and
setting the fan at the desired fan speed only when the desired fan speed is greater than the current fan speed.

16. The method of claim 12 , further comprising controlling access to a memory storage component of the BMC by the custom BMC firmware stack.

17. The method of claim 12 , further comprising remediating the excessive parameter by locking the BIOS of the IHS in a user input mode.

18. The method of claim 12 , further comprising remediating the excessive parameter by writing a warning message to a shared memory location of the BMC, wherein the custom BMC firmware stack is configured to read the warning message from the shared memory location and display the warning message for view by a user.

19. A hardware memory device having program instructions stored thereon that, upon execution by a baseboard Management Controller (BMC) of an Information Handling System (IHS), cause the BMC to:
when a custom BMC firmware stack is executed on the BMC, monitor a parameter of one or more of a plurality of hardware devices of an information handling system (IHS), wherein the instructions that monitor the parameter are separate and distinct from the instructions of the custom BMC firmware stack, and wherein the custom BMC firmware stack has been implemented by an entity that is separate and distinct from a vendor of the IHS; and
when the parameter exceeds a specified threshold, control the BMC to perform one or more operations to remediate the excessive parameter.

20. The hardware memory device of claim 19 , wherein the instructions are further executed to remediate the excessive parameter by:
acquiring one or more additional parameters of one or more of the hardware devices;
calculating a desired fan speed setting according to one or more of the acquired parameters; and

setting the fan at the desired fan speed only when the desired fan speed is greater than the current fan speed.

Assignees

• Dell Products Lp

Inventors

• Lambert Timothy M
• Cho Eugene David
• Maddukuri Akkiah Choudary
• Mugunda Chandrasekhar
• Muthaiyan Arun
• Shabbir Hasnain
• Silveira Alaric J
• Veluthakkal Sreeram

Classifications

• G06F1/206

  comprising thermal management · CPC title

• G06F9/4411

  Configuring for operating with peripheral devices; Loading of device drivers · CPC title

• G06F9/4405 Primary

  Initialisation of multiprocessor systems · CPC title

• G06F11/3055

  Monitoring arrangements for monitoring the status of the computing system or of the computing system component, e.g. monitoring if the computing system is on, off, available, not available (error or fault processing without redundancy G06F11/0703; error detection or correction by redundancy in data representation G06F11/08; error detection or correction of the data by redundancy in operations G06F11/14; error detection or correction by redundancy in hardware G06F11/16) · CPC title

• G06F11/3089

  Monitoring arrangements determined by the means or processing involved in sensing the monitored data, e.g. interfaces, connectors, sensors, probes, agents (software debugging using additional hardware using a specific debug interface G06F11/3656; performance evaluation by tracing or monitoring G06F11/3466) · CPC title