System, apparatus and method for sensor-driven and heuristic-based minimum energy point tracking in a processor

Patent metadata

Field	Value
Publication number	US-11669114-B2
Application number	US-202117528241-A
Country	US
Kind code	B2
Filing date	Nov 17, 2021
Priority date	Jun 28, 2019
Publication date	Jun 6, 2023
Grant date	Jun 6, 2023

Abstract

In one embodiment, a processor includes a minimum energy point (MEP) controller to: generate a change in thermal tracking information, based at least in part on prior and current thermal information; generate a change in activity tracking information, based at least in part on prior activity information and current activity information; and determine a MEP performance state based at least in part on the change in thermal tracking information and the change in activity tracking information. Other embodiments are described and claimed.

First claim

What is claimed is:

1. A processor comprising:
at least one core to execute instructions;
at least one temperature sensor to output thermal information regarding the processor;
an activity monitor to monitor activity of the processor and to output activity information based on the activity; and
a control circuit coupled to the at least one temperature sensor and the activity monitor, the control circuit to:
generate a change in thermal tracking information, based at least in part on prior thermal information and the thermal information;
generate a change in activity tracking information, based at least in part on prior activity information and the activity information; and
determine a minimum energy performance (MEP) performance state based at least in part on at least one of the change in thermal tracking information and the change in activity tracking information.

2. The processor of claim 1 , wherein the control circuit comprises:
at least one encoder to encode the change in thermal tracking information into a first step value and encode the change in activity tracking information into a second step value; and
a calculation circuit to compute a step value based on the first step value and the second step value.

3. The processor of claim 2 , further comprising a memory to store a table having a plurality of entries each to store an operating voltage and an operating frequency, wherein the control circuit is to access the memory using the step value.

4. The processor of claim 3 , wherein the table comprises a per-die programmable table.

5. The processor of claim 2 , wherein the calculation circuit is to sum the first step value and the second step value to compute the step value.

6. The processor of claim 2 , further comprising at least one tracking table including a plurality of entries each to associate the change in thermal tracking information with a corresponding first step value.

7. The processor of claim 6 , wherein the at least one encoder is to access the at least one tracking table with the change in thermal tracking information to obtain the first step value.

8. The processor of claim 7 , wherein the at least one tracking table comprises pre-characterized temperature change data.

9. The processor of claim 1 , wherein the activity comprises micro-architectural activity of the at least one core.

10. The processor of claim 9 , further comprising a performance monitoring unit to monitor the micro-architectural activity.

11. The processor of claim 1 , further comprising a power controller coupled to the control circuit, the power controller to cause a voltage regulator to output a first operating voltage according to the MEP performance state and to cause a clock generation circuit to output a clock signal at a first operating frequency according to the MEP performance state.

12. The processor of claim 1 , further comprising a sweep circuit to trigger a sweep of voltage/frequency values to determine an optimum MEP performance state, the sweep circuit to trigger the sweep in response to expiration of a process-sensitive time duration.

13. The processor of claim 12 , wherein the sweep circuit is further to trigger the sweep of voltage/frequency values to determine an initial optimum MEP performance state upon initialization of the processor.

14. The processor of claim 13 , further comprising a configuration storage to store at least an optimal voltage of the initial optimum MEP performance state.

15. A method comprising:
receiving, in a controller of a processor, thermal tracking information regarding a temperature of the processor and activity tracking information regarding activity of the processor;
generating a change in tracking information, based at least in part on the thermal tracking information and the activity tracking information;
determining a minimum energy point (MEP) performance state based at least in part on the change in tracking information, when at least one of the thermal tracking information and the activity tracking information exceeds a threshold.

16. The method of claim 15 , further comprising:
computing a step value based at least in part on the change in tracking information; and
determining the MEP performance state using the step value.

17. The method of claim 15 , further comprising determining a process variation of the processor and sweeping a plurality of voltage/frequency values to determine an initial optimum MEP performance state upon initialization of the processor.

18. A system comprising:
a processor comprising:
a plurality of cores;
at least one sensor to output thermal information regarding the processor;
at least one process sensor to output process variation information regarding the processor;
an activity monitor to monitor activity of the processor and to output activity information based at least in part thereon; and
a minimum energy point (MEP) controller coupled to the at least one sensor, the at least one process sensor and the activity monitor, wherein the MEP controller is to determine an initial MEP operating point based on a sweep of voltage/frequency values and the process variation information, and thereafter to adjust the initial MEP operating point to an updated MEP operating point based on at least one of the thermal information or the activity information without the sweep of voltage/frequency values; and

a dynamic random access memory coupled to the processor.

19. The system of claim 18 , wherein the MEP controller is to:
generate a change in thermal tracking information, based at least in part on prior thermal information and the thermal information;
generate a change in activity tracking information, based at least in part on prior activity information and the activity information.

20. The system of claim 19 , wherein the MEP controller is to determine the updated MEP operating point when the at least one of the change in thermal tracking information and the change in activity tracking information exceeds a threshold.

Assignees

• Intel Corp

Inventors

• Vangal Sriram R
• Devaraju Jayanth Mallanayakanahalli
• De Vivek
• Milstrey Robert
• Gunther Stephen H

Classifications

• G06F1/3203

  Power management, i.e. event-based initiation of a power-saving mode · CPC title

• G06F1/3243

  Power saving in microcontroller unit · CPC title

• Y02D10/00

  Energy efficient computing, e.g. low power processors, power management or thermal management · CPC title

• G06F16/9017

  using directory or table look-up (use of a directory or look-up table in file systems G06F16/13) · CPC title

• G06F1/324

  by lowering clock frequency · CPC title