Information processing apparatus, information processing method, and recording medium

US11665448B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11665448-B2
Application numberUS-202117386356-A
CountryUS
Kind codeB2
Filing dateJul 27, 2021
Priority dateJan 23, 2017
Publication dateMay 30, 2023
Grant dateMay 30, 2023

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

An information processing apparatus including a specification section specifying, from among a plurality of blocks that are set by dividing pixels included in at least a partial region of a pixel region having a plurality of pixels arrayed therein and each of which includes at least one or more of the pixels, at least one or more of the blocks, and a generation section generating a unique value based on pixel values of the pixels included in the specified blocks.

First claim

Opening claim text (preview).

The invention claimed is: 1. An information processing apparatus, comprising: a specification section configured to specify, from among a plurality of blocks that are set by dividing pixels included in at least a partial region of a pixel region having a plurality of pixels arrayed therein and each of which includes at least one or more of the pixels, two or more blocks of the plurality of blocks; and a generation section configured to: calculate for each block of the specified two or more blocks, a pixel value corresponding to the block based on pixel values of the one or more pixels included in the block; and generate a unique value based on the pixel values corresponding to the specified two or more blocks; wherein the specification section is further configured to: determine, for each of the two or more specified blocks, whether its corresponding pixel value is within a given range including an average of the pixel values corresponding to the two or more blocks; and generate the unique value based on the pixel values corresponding to blocks for which it is determined that the pixel value is not within the given range. 2. The information processing apparatus according to claim 1 , wherein the given range is set based on a dispersion of the pixel values corresponding to the two or more blocks. 3. The information processing apparatus according to claim 1 , wherein the given range is defined in response to setting for error correction of the generated unique value. 4. The information processing apparatus according to claim 1 , wherein the partial region is a region of at least part of an OPB (Optical Black) region. 5. The information processing apparatus according to claim 1 , wherein the plurality of blocks are set by dividing the pixels included in the region for each of one or more pixels that share a given circuit. 6. The information processing apparatus according to claim 1 , wherein the pixel values corresponding to the two or more blocks are determined according to a characteristic of a threshold voltage of a given transistor in the one or more pixels included in the specified two or more blocks. 7. The information processing apparatus according to claim 6 , wherein each of the one or more pixels included in a block of the plurality of blocks includes at least three transistors including a transfer transistor that transfers charge of a photoelectric conversion element to a floating diffusion, an amplification transistor that receives a potential of the floating diffusion and outputs the potential to a signal line, and a reset transistor that controls the potential of the floating diffusion, and the pixel value corresponding to each of the two or more blocks is generated based on a characteristic of the threshold voltage of the amplification transistor included in pixels of the block. 8. The information processing apparatus according to claim 1 , wherein the pixel value corresponding to each of the two or more blocks is an average value of the one or more pixel values of the pixels in the block among a plural number of times of imaging. 9. The information processing apparatus according to claim 1 , comprising: an encryption processing section configured to perform an encryption process for desired information using the generated unique value as key information. 10. The information processing apparatus according to claim 1 , wherein the unique value is outputted as an identifier to an outside. 11. An information processing method executed by a computer, comprising: specifying, from among a plurality of blocks that are set by dividing pixels included in at least a partial region of a pixel region having a plurality of pixels arrayed therein and each of which includes at least one or more of the pixels, two or more of the plurality of blocks; calculating for each block of the specified two or more blocks, a pixel value corresponding to the block based on pixel values of the one or more pixels included in the block; and generating a unique value based on the pixel values corresponding to the specified two or more blocks; wherein the specifying further includes: determining, for each of the two or more specified blocks, whether its corresponding pixel value is within a given range including an average of the pixel values corresponding to the two or more blocks; and generating the unique value based on the pixel values corresponding to blocks for which it is determined that the pixel value is not within the given range. 12. A non-transitory computer readable recording medium on which a program is recorded, the program causing a computer to execute: specifying, from among a plurality of blocks that are set by dividing pixels included in at least a partial region of a pixel region having a plurality of pixels arrayed therein and each of which includes at least one or more of the pixels, two or more of the plurality of blocks; calculating for each block of the specified two or more blocks, a pixel value corresponding to the block based on pixel values of the one or more pixels included in the block; and generating a unique value based on the pixel values corresponding to the specified two or more blocks; wherein the specifying further includes: determining, for each of the two or more specified blocks, whether its corresponding pixel value is within a given range including an average of the pixel values corresponding to the two or more blocks; and generating the unique value based on the pixel values corresponding to blocks for which it is determined that the pixel value is not within the given range.

Assignees

Inventors

Classifications

  • H04N25/46Primary

    by combining or binning pixels · CPC title

  • of bump connectors, dummy bumps or thermal bumps · CPC title

  • Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters · CPC title

  • Circuitry for scanning or addressing the pixel array · CPC title

  • Image sensors · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US11665448B2 cover?
An information processing apparatus including a specification section specifying, from among a plurality of blocks that are set by dividing pixels included in at least a partial region of a pixel region having a plurality of pixels arrayed therein and each of which includes at least one or more of the pixels, at least one or more of the blocks, and a generation section generating a unique value…
Who is the assignee on this patent?
Sony Semiconductor Solutions Corp
What technology area does this patent fall under?
Primary CPC classification H04N25/46. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 30 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).