Insulating layer for printed circuit board, and printed circuit board
US-2016309582-A1 · Oct 20, 2016 · US
US11664240B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11664240-B2 |
| Application number | US-201816763796-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 1, 2018 |
| Priority date | Nov 16, 2017 |
| Publication date | May 30, 2023 |
| Grant date | May 30, 2023 |
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The method for producing a laminate having a patterned metal foil includes masking the whole surface of a first metal foil in a laminate having the first metal foil, a first insulating resin layer having a thickness of 1 to 200 μm and a second metal foil laminated in this order, and patterning the second metal foil.
Opening claim text (preview).
The invention claimed is: 1. A method for producing a laminate having a patterned metal foil, comprising: masking a whole surface of a first metal foil in a laminate having the first metal foil, a first insulating resin layer having a thickness of 1 to 200 μm and a second metal foil laminated in this order; patterning the second metal foil; laminating a second insulating resin layer on the first insulating resin layer having the second metal foil laminated thereon so that the second metal foil in the laminate having the patterned metal foil is covered with the second insulating resin layer; laminating a third metal foil on the second insulating resin layer; masking a whole surface of the third metal foil in the laminate having the patterned metal foil; and patterning the first metal foil. 2. The method according to claim 1 , wherein a thickness of the first metal foil is 1 to 100 μm. 3. The method according to claim 1 , wherein the masking includes laminating a resist on the whole surface of the first metal foil for masking. 4. The method according to claim 1 , wherein the masking includes laminating a resist on the whole surface of the third metal foil for masking. 5. A method for producing a laminate having a patterned metal foil, comprising: laminating a third insulating resin layer on the first insulating resin layer having the first metal foil laminated thereon so that the first metal foil in the laminate having the patterned metal foil according to claim 1 is covered with the third insulating resin layer; and laminating a fourth metal foil on the third insulating resin layer. 6. The method according to claim 1 , further comprising irradiating a predetermined position of a surface of the third metal foil with a laser beam to thereby provide a first via hole starting from the surface of the third metal foil and reaching the second metal foil or the first metal foil on an opposite surface. 7. The method according to claim 6 , further comprising subjecting an inside of the first via hole to a desmear treatment. 8. The method according to claim 5 , further comprising irradiating a predetermined position of a surface of the third metal foil with a laser beam to thereby provide a second via hole starting from the surface of the third metal foil and reaching any of the second metal foil, the first metal foil or the fourth metal foil on an opposite surface. 9. The method according to claim 5 , further comprising irradiating a predetermined position of a surface of the fourth metal foil with a laser beam to thereby provide a third via hole starting from the surface of the fourth metal foil and reaching any of the first metal foil, the second metal foil or the third metal foil on an opposite surface. 10. The method according to claim 8 , further comprising subjecting an inside of the second via hole to a desmear treatment. 11. The method according to claim 9 , further comprising subjecting an inside of the third via hole to a desmear treatment.
comprising multiple insulating layers · CPC title
Shapes or dispositions of interconnections · CPC title
of insulating or insulated package substrates, or of interposers, or of redistribution layers (manufacture or treatment of leadframes H10W70/04) · CPC title
Glass fibres · CPC title
characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated · CPC title
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