Parsing regular expressions with spiking neural networks

US11663449B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11663449-B2
Application numberUS-201716648169-A
CountryUS
Kind codeB2
Filing dateDec 15, 2017
Priority dateDec 15, 2017
Publication dateMay 30, 2023
Grant dateMay 30, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

Techniques and mechanisms for providing a logical state machine with a spiking neural network which includes multiple sets of nodes. Each of the multiple sets of nodes is to implement a different respective state, and each of the multiple spike trains is provided to respective nodes of each of the multiple sets of nodes. A given state of the logical state machine is implemented by configuring respective activation modes of each node of the corresponding set of nodes. The activation mode of a given node enables that node to signal, responsive to its corresponding spike train, that a respective state transition of the logical state machine is to be performed. In another embodiment, the multiple spike trains each represent a different respective character in a system used by data evaluated with the spiking neural network.

First claim

Opening claim text (preview).

What is claimed is: 1. A computer device for detecting a regular expression with a spiking neural network, the computer device comprising circuitry to: provide a first state of a logical state machine with a first set of nodes of a spiking neural network, wherein the logical state machine represents a regular expression to be detected, wherein multiple sets of nodes of the spiking neural network comprise the first set of nodes and a second set of nodes, wherein the first state of the logical state machine comprises respective activation modes of each of the first set of nodes, wherein a second state of the logical state machine comprises respective activation modes of each of the second set of nodes, and wherein the first set of nodes comprises a first node; receive multiple input spike trains at the multiple sets of nodes, wherein the multiple input spike trains are to represent a string of characters to be evaluated, wherein: for each set of nodes of the multiple sets of nodes, the set of nodes is to receive each input spike train of the multiple input spike trains, wherein the first node is to receive a first input spike train of the multiple input spike trains, for each node of the multiple sets of nodes, a respective activation mode of the node is to enable the node to configure a respective state of the logical state machine, in response to a corresponding one of the multiple input spike trains, with a respective set of nodes of the multiple sets of nodes, and in response to the first input spike train, the first node is to: generate one or more output spike trains, during the first state, and transition from a first activation mode after a communication of the one or more output spike trains from the first node; provide the second state of the logical state machine in response to the one or more output spike trains, wherein the one or more output spike trains are to transition each node of the second set of nodes to a respective activation mode. 2. The computer device of claim 1 , wherein each state of the logical state machine corresponds to a different respective set of nodes of the multiple sets of nodes, wherein, for each state of the logical state machine, the state includes a configuration of the respective activation modes of each node of the corresponding set of nodes. 3. The computer device of claim 1 , further comprising circuitry to: provide, in response to the first input spike train being received at the first node, a third state of the logical state machine with a third set of nodes of the multiple sets of nodes, including circuitry to configure the respective activation modes of each node of the third set of nodes, wherein the third state is to be concurrent with the second state. 4. The computer device of claim 1 , wherein, for each set of nodes of the multiple sets of nodes, each node of the set of nodes is to configure a different respective one and only one state of the logical state machine. 5. The computer device of claim 1 , wherein another node of the first set of nodes is to: receive another input spike train of the multiple input spike trains; and signal, in response the other input spike train, that the respective activation modes of each node of the first set of nodes are to be reconfigured or maintained. 6. The computer device of claim 1 , wherein the spiking neural network is to perform state transitions of the logical state machine, each state transition to detect a respective character of the regular expression. 7. The computer device of claim 1 , wherein the multiple input spike trains are each to correspond to a different respective one and only one character, wherein for each input spike train of the multiple input spike trains, a respective spiking pattern of the input spike train is to indicate an instance of the corresponding character of the regular expression. 8. The computer device of claim 1 , further comprising circuitry to: configure an initialization state of the spiking neural network, including circuitry to configure the respective activation modes of each node of the first set of nodes, wherein the initialization state is to be configured independent of any of the multiple input spike trains. 9. The computer device of claim 1 , wherein for one set of nodes of the multiple sets of nodes, a node of the one set of nodes is to output a signal indicating that a search criteria has been satisfied, the search criteria including a string of characters. 10. The computer device of claim 9 , wherein each node of the set of nodes is to output a respective signal indicating that the search criteria has been satisfied. 11. At least one non-transitory machine readable medium including instructions that, when executed by a machine, cause the machine to perform operations for detecting a regular expression with a spiking neural network, the operations comprising: providing a first state of a logical state machine with a first set of nodes of the spiking neural network, wherein the logical state machine represents a regular expression to be detected, wherein multiple sets of nodes of the spiking neural network include comprise the first set of nodes and a second set of nodes, wherein the first state of the logical state machine comprises respective activation modes of each of the first set of nodes, wherein a second state of the logical state machine comprises respective activation modes of each of the second set of nodes, and wherein the first set of nodes comprises a first node; receiving multiple input spike trains at the multiple sets of nodes, wherein the multiple input spike trains represent a string of characters to be evaluated, wherein: for each set of nodes of the multiple sets of nodes, the set of nodes receives each input spike train of the multiple input spike trains, wherein the first node receives a first input spike train of the multiple input spike trains, for each node of the multiple sets of nodes, a respective activation mode of the node enables the node to configure a respective state of the logical state machine, in response to a corresponding one of the multiple input spike trains, with a respective set of nodes of the multiple sets of nodes, and in response to the first input spike train, the first node: generates one or more output spike trains, during the first state, and transitions from a first activation mode after a communication of the one or more output spike trains from the first node; providing the second state of the logical state machine, in response to the one or more output spike trains, wherein the one or more output spike trains are to transition each node of the second set of nodes to a respective activation mode. 12. The least one non-transitory machine readable medium of claim 11 , wherein each state of the logical state machine corresponds to a different respective set of nodes of the multiple sets of nodes, wherein, for each state of the logical state machine, the state includes a configuration of the respective activation modes of each node of the corresponding set of nodes. 13. The least one non-transitory machine readable medium of claim 11 , the operations further comprising: in response to receiving the first input spike train at the first node, providing a third state of the logical state machine with a third set of nodes of the multiple sets of nodes, including configuring the respective activation modes of each node of the third set of nodes, wherein the third state is concurrent with the second state. 14. The least one non-transitory machine readable medium of claim 11 , wherein, for each set of nodes of the multiple sets

Assignees

Inventors

Classifications

  • Knowledge-based neural networks; Logical representations of neural networks · CPC title

  • Dynamic search techniques; Heuristics; Dynamic trees; Branch-and-bound · CPC title

  • G06N3/049Primary

    Temporal neural networks, e.g. delay elements, oscillating neurons or pulsed inputs · CPC title

  • Learning methods · CPC title

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What does patent US11663449B2 cover?
Techniques and mechanisms for providing a logical state machine with a spiking neural network which includes multiple sets of nodes. Each of the multiple sets of nodes is to implement a different respective state, and each of the multiple spike trains is provided to respective nodes of each of the multiple sets of nodes. A given state of the logical state machine is implemented by configuring r…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification G06N3/049. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 30 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).