Intermediate substrate and fabrication method thereof

Patent metadata

Field	Value
Publication number	US-11658104-B2
Application number	US-202217679245-A
Country	US
Kind code	B2
Filing date	Feb 24, 2022
Priority date	Mar 4, 2021
Publication date	May 23, 2023
Grant date	May 23, 2023

Abstract

An intermediate substrate is provided with a plurality of conductive posts and support members arranged at opposite sides of a coreless circuit structure and insulating layers encapsulating the conductive posts and the support members. Through the arrangement of the support members and the insulating layers, the intermediate substrate can meet the rigidity requirement so as to effectively resist warping and achieve an application of fine-pitch circuits.

First claim

What is claimed is:

1. An intermediate substrate, comprising:
a coreless circuit structure having opposite first and second surfaces, wherein both the first and second surfaces have circuit layers exposed therefrom;
a plurality of first conductive posts having opposite first and second end surfaces, wherein the first conductive posts are bonded and electrically connected to the circuit layer exposed from the first surface of the coreless circuit structure via the first end surfaces of the first conductive posts;
a first support member being a plate body having a plurality of mesh-shaped openings and having opposite first and second sides, wherein the first support member is disposed on the first surface of the coreless circuit structure via the first side of the first support member, and the plurality of first conductive posts are positioned in at least one of the mesh-shaped openings of the first support member;
a first insulating layer formed on the first surface of the coreless circuit structure for encapsulating the plurality of first conductive posts and the first support member, wherein the second end surfaces of the plurality of first conductive posts are exposed from the first insulating layer;
a plurality of second conductive posts having opposite first and second end surfaces, wherein the plurality of second conductive posts are bonded and electrically connected to the circuit layer exposed from the second surface of the coreless circuit structure via the first end surfaces of the second conductive posts;
a second support member being a plate body having a plurality of mesh-shaped openings and having opposite first and second sides, wherein the second support member is disposed on the second surface of the coreless circuit structure via the first side of the second support member, and the plurality of second conductive posts are positioned in at least one of the mesh-shaped openings of the second support member; and
a second insulating layer formed on the second surface of the coreless circuit structure for encapsulating the plurality of second conductive posts and the second support member, wherein the second end surfaces of the plurality of second conductive posts are exposed from the second insulating layer.

2. The intermediate substrate of claim 1 , wherein the second side of the first support member is exposed from the first insulating layer, and/or the second side of the second support member is exposed from the second insulating layer.

3. The intermediate substrate of claim 1 , wherein at least one of the first conductive posts and the second conductive posts comprise a plurality of layers of post bodies stacked on one another.

4. The intermediate substrate of claim 1 , wherein the first side of the first support member is bonded to the circuit layer exposed from the first surface of the coreless circuit structure, and/or the first side of the second support member is bonded to the circuit layer exposed from the second surface of the coreless circuit structure.

5. The intermediate substrate of claim 1 , wherein at least one of the first support member and the second support member comprises a plurality of layers of plate bodies stacked on one another and each having a plurality of mesh-shaped openings.

6. The intermediate substrate of claim 1 , wherein the plurality of first conductive posts are positioned in the mesh-shaped openings of the first support member, respectively, and/or the plurality of second conductive posts are positioned in the mesh-shaped openings of the second support member, respectively.

7. The intermediate substrate of claim 1 , wherein the plurality of first conductive posts and the first support member are made of copper or copper alloy, and wherein the plurality of second conductive posts and the second support member are made of copper, copper alloy, stainless steel, or iron-nickel alloy.

8. The intermediate substrate of claim 1 , wherein at least one of the first support member and the second support member is made of metal, organic resin, plastic steel, or ceramic insulating material.

9. The intermediate substrate of claim 1 , wherein the second end surfaces of the plurality of first conductive posts serve as a chip mounting side for bonding with a chip or an interposer in a flip-chip manner, and the second end surfaces of the plurality of second conductive posts serve as a circuit board mounting side for bonding with a circuit board.

10. A method for fabricating an intermediate substrate, comprising:
providing a carrier;
forming a plurality of first conductive posts on the carrier by patterned electroplating;
forming a plate body-shaped first support member having a plurality of mesh-shaped openings to cause the plurality of first conductive posts to be positioned in at least one of the mesh-shaped openings of the first support member;
forming a first insulating layer on the carrier for encapsulating the plurality of first conductive posts and the first support member;
leveling the first insulating layer, wherein one end surfaces of the plurality of first conductive posts are exposed from a surface of the first insulating layer;
forming a coreless circuit structure having at least one circuit layer on the first insulating layer, the plurality of first conductive posts and the first support member by a build-up process to bond the circuit layer of the coreless circuit structure to one end surface of the plurality of first conductive posts;
forming a plurality of second conductive posts on the coreless circuit structure by patterned electroplating;
forming a plate body-shaped second support member having a plurality of mesh-shaped openings to cause the plurality of second conductive posts to be positioned in at least one of the mesh-shaped openings of the second support member and bond one end surfaces of the plurality of second conductive posts to the circuit layer of the coreless circuit structure;
forming a second insulating layer on the coreless circuit structure for encapsulating the plurality of second conductive posts and the second support member;
leveling the second insulating layer, wherein the other end surfaces of the plurality of second conductive posts are exposed from a surface of the second insulating layer; and
removing the carrier to expose the other end surfaces of the plurality of first conductive posts from the first insulating layer.

11. The method of claim 10 , wherein the first support member and the plurality of first conductive posts are simultaneously formed on the carrier by patterned electroplating, and the first conductive posts comprise a single layer of post body or a plurality of layers of post bodies stacked on one another, and/or the first support member comprises a single layer of plate body having a plurality of mesh-shaped openings or a plurality of layers of plate bodies stacked on one another and having a plurality of mesh-shaped openings.

12. The method of claim 10 , wherein the plurality of first conductive posts are formed on the carrier by patterned electroplating first and then the first support member having the plurality of mesh-shaped openings is bonded onto the carrier via an adhesive material, wherein the first conductive posts comprise a single layer of post body or a plurality of layers of post bodies stacked on one another, and/or the first support member comprises a single layer of plate body having a plurality of mesh-shaped openings or a plurality of layers of plate bodies stacked on one another and having a plurality of mesh-shaped openings; or the first support member having the plurality of mesh-shaped openings is bonded onto the carrier via an adhesive material first an

Assignees

• Phoenix Pioneer Technology Co Ltd

Inventors

• Hsu Shih-Ping
• Hu Chu-Chin
• Chou Pao-Hung

Classifications

• H10W90/401

  characterised by multiple insulating or insulated package substrates, interposers or RDLs · CPC title

• H10W70/635

  Through-vias · CPC title

• H10W70/611

  for connecting multiple chips together · CPC title

• H10W70/685 Primary

  comprising multiple insulating layers · CPC title

• H10W90/701

  characterised by the relative positions of pads or connectors relative to package parts · CPC title