Dynamic fast charge pulse generator for an RF circuit

Patent metadata

Field	Value
Publication number	US-11652450-B2
Application number	US-202017061290-A
Country	US
Kind code	B2
Filing date	Oct 1, 2020
Priority date	Oct 1, 2020
Publication date	May 16, 2023
Grant date	May 16, 2023

Abstract

Circuits and methods for generating a bypass pulse to an RF circuit that increases the response time of the circuit to mode changes. Embodiments include a pulse generation circuit that it is self-initiated and self-terminated, generating a bypass pulse as a function of voltages V1 and V2 along a signal path. Voltage V3, a scaled version of V1, is compared to a voltage V4 derived from V2 and a pulse is output while V3>V4. The pulse temporarily lowers the signal path impedance, reducing the RC time constant of the signal path and allowing fast charging of components coupled to the signal path. The pulse may be used with any other circuit that needs a faster settling time after a mode change but is slowed down by an RC time constant. Usage also extends to providing for rapid discharge of the signal path by adding additional logic components.

First claim

What is claimed is:

1. A fast-charge pulse generation circuit configured to be coupled to an RF circuit including a signal path having a first voltage node with a fast settling time and a second voltage node with a slower settling time, the fast-charge pulse generation circuit including:
(a) a scaling circuit configured to receive a first voltage from the first voltage node of the signal path and to output a scaled voltage version of the first voltage; and
(b) a comparator having a first input coupled to the scaled voltage, a second input configured to receive a second voltage derived from the second voltage node of the signal path, and an output configured to be coupled to a circuit element configured to reduce the settling time of the second voltage node;
wherein the comparator generates an output pulse which controls the circuit element, when coupled to the comparator output, while the scaled voltage is greater than the second voltage.

2. The invention of claim 1 , wherein the second input voltage to the comparator is a scaled version of the voltage at the second voltage node.

3. A fast-charge pulse generation circuit configured to be coupled to an RF circuit including a signal path having a first voltage node with a fast settling time and a second voltage node with a slower settling time, the fast-charge pulse generation circuit including:
(a) a scaling circuit configured to receive a first voltage from the first voltage node of the signal path and to output a scaled voltage version of the first voltage; and
(b) a comparator having a first input coupled to the scaled voltage, a second input configured to receive a second voltage derived from the second voltage node of the signal path, and an output configured to be coupled to at least a bypass switch coupled in parallel with an impedance within the signal path;
wherein the comparator generates an output pulse which closes the bypass switch, when coupled to the comparator output, while the scaled voltage is greater than the second voltage.

4. The invention of claim 3 , wherein the RF circuit is a low-noise amplifier.

5. The invention of claim 3 , wherein the impedance is coupled between the first voltage node and the second voltage node.

6. The invention of claim 3 , wherein the second voltage node has an RC constant determined in part by the impedance.

7. The invention of claim 3 , wherein the output of the comparator is configured to be coupled to at least one other circuit capable of utilizing the generated output pulse.

8. The invention of claim 3 , wherein the output of the comparator is configured to be coupled to a shunt switch coupled between an RF signal input of the RF circuit and circuit ground.

9. The invention of claim 3 , wherein the scaling circuit includes a resistive divider.

10. The invention of claim 3 , further including logic circuitry, coupled to the output of the comparator, for generating an inverted version of the output pulse while (1) the scaled voltage is less than or equal to the second voltage and (2) a control signal is asserted.

11. The invention of claim 3 , wherein the second input voltage to the comparator is a scaled version of the voltage at the second voltage node.

12. A low-noise amplifier (LNA), the LNA including:
(a) a signal path having a first voltage node with a fast settling time in response to a mode change for the LNA, and a second voltage node with a slower settling time in response to the mode change for the LNA;
(b) a fast-charge pulse generation circuit including:
(1) a scaling circuit configured to receive a first voltage from the first voltage node and output a scaled voltage version of the first voltage; and
(2) a comparator having a first input coupled to the scaled voltage, a second input configured to receive a second voltage derived from the second voltage node, and an output coupled to at least a bypass switch coupled in parallel with an impedance within the signal path of the LNA;

wherein the comparator generates an output pulse which closes the bypass switch, when coupled to the comparator output, while the scaled voltage is greater than the second voltage.

13. The invention of claim 12 , wherein the impedance is coupled between the first voltage node and the second voltage node.

14. The invention of claim 12 , wherein the second voltage node has an RC constant determined in part by the impedance.

15. The invention of claim 12 , wherein the output of the comparator is configured to be coupled to at least one other circuit capable of utilizing the generated output pulse.

16. The invention of claim 12 , wherein the output of the comparator is configured to be coupled to a shunt switch coupled between an RF signal input of the LNA and circuit ground.

17. The invention of claim 12 , wherein the scaling circuit includes a resistive divider.

18. The invention of claim 12 , wherein the second voltage derived from the second voltage node is a scaled version of the voltage at the second voltage node.

19. The invention of claim 12 , further including logic circuitry, coupled to the output of the comparator, for generating an inverted version of the output pulse while (1) the scaled voltage is less than or equal to the second voltage and (2) a control signal is asserted.

20. The invention of claim 19 , further including a shunt switch coupled to the first voltage node and controlled by the control signal.

Assignees

• Psemi Corp

Inventors

• Tong Yucheng
• Lai Ping Wing
• Shah Khushali

Classifications

• H03F3/19 Primary

  with semiconductor devices only · CPC title

• H03F2200/294

  the amplifier being a low noise amplifier [LNA] · CPC title

• H03K5/08

  by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding (H03K5/07 takes precedence; comparing one pulse with another H03K5/22; providing a determined threshold for switching H03K17/30) · CPC title

• H03F3/245

  with semiconductor devices only · CPC title

• H03F2200/451

  the amplifier being a radio frequency amplifier · CPC title