Phased array architecture with distributed temperature compensation and integrated up/down conversion

US11652267B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11652267-B2
Application numberUS-202117369557-A
CountryUS
Kind codeB2
Filing dateJul 7, 2021
Priority dateApr 5, 2018
Publication dateMay 16, 2023
Grant dateMay 16, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A conditioning integrated circuit (CDIC) chip can be used to aggregate signals to/from a number of beam forming integrated circuit (BFIC) chips, and signals to/from a number of CDIC chips can be aggregated by an interface integrated circuit (IFIC) chip. The CDIC chip includes temperature compensation circuitry to adjust the gain of the transmit and receive signals as a function of temperature based on inputs from a temperature sensor. The CDIC may include a plurality of beam forming channels each having a transmit circuit and a receive circuit, a common port coupled to the beam forming channels for selectively providing a common transmit signal to the beam forming channels and receiving a common receive signal from the beam forming channels, and a temperature compensation circuit configured to provide variable attenuation to the common transmit signal and the common receive signal based on a temperature sense signal.

First claim

Opening claim text (preview).

What is claimed is: 1. A conditioning integrated circuit for use with a plurality of beam forming integrated circuits in a phase array system, the conditioning integrated circuit comprising: a plurality of beam forming channels, each beam forming channel including a transmit circuit configured to provide a transmit signal to at least one of the plurality of beam forming integrated circuits based on a common transmit signal and a receive circuit configured to provide an output signal based on temperature-compensated signals from at least one of the plurality of beam forming integrated circuits; a common port coupled to the beam forming channels for selectively providing the common transmit signal to the beam forming channels and receiving a common receive signal based on the output signals from the beam forming channels; and a temperature compensation circuit configured to perform temperature-based variable gain compensation to the common receive signal based on a temperature sense signal to compensate for residual gain variation over temperature remaining after the beam forming integrated circuits. 2. A conditioning integrated circuit according to claim 1 , wherein the conditioning integrated circuit is configured to operate in a dual pole manner. 3. A conditioning integrated circuit according to claim 1 , wherein the conditioning integrated circuit comprises: a temperature sensor configured to provide the temperature sense signal; a transmit variable attenuator configured to provide variable attenuation to the common transmit signal based on the temperature sense signal; and a receive variable attenuator configured to provide variable attenuation to the common receive signal based on the temperature sense signal. 4. A conditioning integrated circuit according to claim 3 , wherein the variable attenuators are digital attenuators. 5. A conditioning integrated circuit according to claim 1 , wherein each receive circuit includes a first switchable path including phase/gain control circuitry and a second switchable path bypassing the phase/gain control circuitry. 6. A conditioning integrated circuit according to claim 1 , wherein the common port includes a switch for selectively coupling the common transmit signal or the common receive signal to a common signal interface. 7. A conditioning integrated circuit according to claim 1 , wherein the common port includes separate transmit and receive signal interfaces, the transmit signal interface providing the common transmit signal from an external device to the beam forming channels, the receive signal interface providing the common receive signal from the beam forming channels to the external device. 8. A conditioning integrated circuit according to claim 1 , wherein the conditioning integrated circuit comprises exactly two beam forming channels. 9. A conditioning integrated circuit according to claim 1 , wherein the conditioning integrated circuit comprises exactly four beam forming channels. 10. A phased array system comprising: a plurality of beam forming integrated circuits, each beam forming integrated circuit couplable to a distinct set of beam forming elements; and a conditioning integrated circuit coupled to the plurality of beam forming integrated circuits and configured to aggregate beam forming signals to and from the plurality of beam forming integrated circuits, the conditioning integrated circuit comprising: a plurality of beam forming channels, each beam forming channel including a transmit circuit configured to provide a transmit signal to at least one of the plurality of beam forming integrated circuits based on a common transmit signal and a receive circuit configured to provide an output signal based on temperature-compensated signals from at least one of the plurality of beam forming integrated circuits; a common port coupled to the beam forming channels for selectively providing the common transmit signal to the beam forming channels and receiving a common receive signal based on the output signals from the beam forming channels; and a temperature compensation circuit configured to perform temperature-based variable gain compensation to the common receive signal based on a temperature sense signal to compensate for residual gain variation over temperature remaining after the beam forming integrated circuits. 11. A system according to claim 10 , further comprising a plurality of beam forming elements. 12. A system according to claim 10 , wherein the conditioning integrated circuit is configured to operate in a dual pole manner. 13. A system according to claim 10 , wherein the conditioning integrated circuit comprises: a temperature sensor configured to provide the temperature sense signal; a transmit variable attenuator configured to provide variable attenuation to the common transmit signal based on the temperature sense signal; and a receive variable attenuator configured to provide variable attenuation to the common receive signal based on the temperature sense signal. 14. A system according to claim 13 , wherein the variable attenuators are digital attenuators. 15. A system according to claim 10 , wherein each receive circuit includes a first switchable path including phase/gain control circuitry and a second switchable path bypassing the phase/gain control circuitry. 16. A system according to claim 10 , wherein the common port includes a switch for selectively coupling the common transmit signal or the common receive signal to a common signal interface. 17. A system according to claim 10 , wherein the common port includes separate transmit and receive signal interfaces, the transmit signal interface providing the common transmit signal from an external device to the beam forming channels, the receive signal interface providing the common receive signal from the beam forming channels to the external device. 18. A system according to claim 10 , wherein the conditioning integrated circuit comprises exactly two beam forming channels. 19. A system according to claim 10 , wherein the conditioning integrated circuit comprises exactly four beam forming channels. 20. A system according to claim 10 , further comprising: a controller configured to control a distribution of temperature compensation between at least the beam forming integrated circuits and the conditioning integrated circuit to provide a predetermined amount of temperature-based gain compensation while substantially optimizing efficiency across the phased array system.

Assignees

Inventors

Classifications

  • Arrays of individually energised antenna units similarly polarised and spaced apart · CPC title

  • H01Q1/02Primary

    Arrangements for de-icing; Arrangements for drying-out {; Arrangements for cooling; Arrangements for preventing corrosion} · CPC title

  • varying the amplitude · CPC title

  • Modular arrays · CPC title

  • mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package · CPC title

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What does patent US11652267B2 cover?
A conditioning integrated circuit (CDIC) chip can be used to aggregate signals to/from a number of beam forming integrated circuit (BFIC) chips, and signals to/from a number of CDIC chips can be aggregated by an interface integrated circuit (IFIC) chip. The CDIC chip includes temperature compensation circuitry to adjust the gain of the transmit and receive signals as a function of temperature b…
Who is the assignee on this patent?
Anokiwave Inc
What technology area does this patent fall under?
Primary CPC classification H01Q1/02. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 16 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).