Nitride semiconductor device comprising layered structure of active region and method for manufacturing the same

US11652145B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11652145-B2
Application numberUS-201916591677-A
CountryUS
Kind codeB2
Filing dateOct 3, 2019
Priority dateOct 5, 2018
Publication dateMay 16, 2023
Grant dateMay 16, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A nitride semiconductor device includes a channel layer, a barrier layer made of AlxInyGa1-x-yN (x>0, x+y≤1), an active region that has a layered structure including the channel layer and the barrier layer, an inactive region that is formed at the layered structure around the active region and that is a concave portion having a bottom portion that reaches the channel layer, a gate layer made of a nitride semiconductor selectively formed on the barrier layer in the active region, a gate electrode formed on the gate layer, a first insulating film that covers the gate electrode and that is in contact with the barrier layer in the active region, and a second insulating film that covers the first insulating film and that is in contact with the inactive region.

First claim

Opening claim text (preview).

What is claimed is: 1. A nitride semiconductor device comprising: a channel layer made of a nitride semiconductor; a barrier layer that is formed on the channel layer and that is made of Al x In y Ga 1-x-y N (x>0, x+y≤1); an active region that has a layered structure including the channel layer and the barrier layer; an inactive region that is formed at the layered structure around the active region and that is a concave portion having a bottom portion that reaches the channel layer; a gate layer that is selectively formed on the barrier layer in the active region and that is made of a nitride semiconductor; a gate electrode formed on the gate layer; a first insulating film that covers the gate electrode and that is in contact with the barrier layer in the active region; and a second insulating film that covers the first insulating film and that is in contact with the inactive region, wherein the second insulating film is a multi-layer film, the first insulating film is a nitride film, and the second insulating film includes a layered structure including a nitride film and an oxide film disposed on the nitride film. 2. The nitride semiconductor device according to claim 1 , further comprising an ohmic electrode that is formed on the first insulating film, that is covered with the second insulating film, and that is ohmically connected to the barrier layer through the first insulating film. 3. The nitride semiconductor device according to claim 2 , wherein the ohmic electrode includes a source electrode and a drain electrode between which the gate electrode is placed. 4. The nitride semiconductor device according to claim 3 , wherein the source electrode and the drain electrode have a rectangle shape in a plan view, and a plurality of the source electrodes and the drain electrodes are alternately arranged such that long side directions thereof are parallel to each other. 5. The nitride semiconductor device according to claim 1 , wherein the gate layer is formed in a self-aligned manner with respect to the gate electrode. 6. The nitride semiconductor device according to claim 1 , wherein the concave portion has a depth deeper than a depth position of a two-dimensional electron gas in the layered structure of the active region. 7. The nitride semiconductor device according to claim 1 , wherein the concave portion has a side portion that is tilted with respect to a surface of the barrier layer. 8. The nitride semiconductor device according to claim 1 , wherein the first insulating film has an end surface that in continuous with an end surface of the barrier layer. 9. The nitride semiconductor device according to claim 1 , wherein a plurality of the gate electrodes are surrounded by the inactive region. 10. The nitride semiconductor device according to claim 1 , wherein the barrier layer has a thickness from 10 nm to 20 nm. 11. The nitride semiconductor device according to claim 1 , wherein the first insulating film has a thickness from 90 nm to 110 nm. 12. The nitride semiconductor device according to claim 1 , wherein the second insulating film has a thickness from 0.8 μm to 1.2 μm. 13. The nitride semiconductor device according to claim 1 , wherein the channel layer is made of a GaN layer. 14. The nitride semiconductor device according to claim 1 , wherein the gate layer is made of a GaN layer doped with an acceptor-type impurity. 15. A method for manufacturing a nitride semiconductor device, the method comprising: a step of forming a barrier layer made of Al x In y Ga 1-x-y N (x>0, x+y≤1) on a channel layer made of a nitride semiconductor; a step of forming a first nitride semiconductor layer on the barrier layer; a step of selectively forming a gate electrode on the first nitride semiconductor layer; a step of forming a gate layer made of the first nitride semiconductor layer directly under the gate electrode by selectively removing a part of the first nitride semiconductor layer while using the gate electrode as a mask; a step of forming a first insulating film on the barrier layer so as to cover the gate electrode; a step of forming a first opening in the first insulating film by selectively removing a part of the first insulating film; a step of forming an inactive region that is a concave portion whose bottom portion reaches the channel layer by removing the barrier layer and the channel layer successively from the first opening while using the first insulating film as a mask; and a step of forming a second insulating film so as to be brought into contact with the inactive region and cover the first insulating film. 16. The method for manufacturing a nitride semiconductor device according to claim 15 , wherein the step of forming the second insulating film includes a step of forming a first film made of the same material as the first insulating film so as to be brought into contact with the inactive region and a step of forming a second film made of a different material from the material of the first insulating film on the first film.

Assignees

Inventors

Classifications

  • for lateral devices wherein the source or drain electrodes are characterised by top-view geometrical layouts, e.g. interdigitated, semi-circular, annular or L-shaped electrodes (source or drain electrodes of TFTs H10D30/673) · CPC title

  • Nitride Group III-V materials, e.g. AlN or GaN · CPC title

  • H10D30/475Primary

    having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs · CPC title

  • of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT · CPC title

  • for FETs · CPC title

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What does patent US11652145B2 cover?
A nitride semiconductor device includes a channel layer, a barrier layer made of AlxInyGa1-x-yN (x>0, x+y≤1), an active region that has a layered structure including the channel layer and the barrier layer, an inactive region that is formed at the layered structure around the active region and that is a concave portion having a bottom portion that reaches the channel layer, a gate layer made of…
Who is the assignee on this patent?
Rohm Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10D62/8503. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 16 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).