Analog-to-digital converting circuit, image sensing device and operation method thereof

Patent metadata

Field	Value
Publication number	US-11647308-B2
Application number	US-202217574181-A
Country	US
Kind code	B2
Filing date	Jan 12, 2022
Priority date	May 12, 2021
Publication date	May 9, 2023
Grant date	May 9, 2023

Abstract

An analog-to-digital converting circuit includes: an analog-to-digital converter suitable for performing an analog-to-digital conversion on pixel signals of a plurality of pixels provided in a pixel array; a ramp signal generator suitable for providing a ramp signal to the analog-to-digital converter; and an auto-zero controller suitable for providing a reference voltage to the analog-to-digital converter to perform an auto-zeroing operation by using a row pixel for which a readout operation is performed by the analog-to-digital converter.

First claim

What is claimed is:

1. An analog-to-digital converting circuit, comprising:
an analog-to-digital converter suitable for performing an analog-to-digital conversion on pixel signals of a plurality of pixels provided in a pixel array;
a ramp signal generator suitable for providing a ramp signal to the analog-to-digital converter; and
an auto-zeroing controller suitable for providing an auto-zeroing reference voltage to the analog-to-digital converter to perform an auto-zeroing operation by using a row pixel of the plurality of pixels on which a readout operation is completed by the analog-to-digital converter.

2. The analog-to-digital converting circuit of claim 1 ,
wherein the auto-zeroing controller is further suitable for blocking the auto-zeroing reference voltage provided to the analog-to-digital converter so that the pixel signal of the row pixel on which the readout operation is completed is applied, as the auto-zeroing reference signal, to one input terminal of the analog-to-digital converter, and
wherein the ramp signal generator provides the ramp signal, as the auto-zeroing reference voltage, to the other input terminal of the analog-to-digital converter.

3. The analog-to-digital converting circuit of claim 2 , wherein the auto-zeroing controller is further suitable for generating an initialization signal to initialize the auto-zeroing operation.

4. The analog-to-digital converting circuit of claim 1 , wherein each of the pixels is formed of a three-transistor structure.

5. The analog-to-digital converting circuit of claim 1 , wherein the analog-to-digital converter includes:
a comparator suitable for comparing each pixel signal provided from the pixel array with the ramp signal provided from the ramp signal generator according to the auto-zeroing reference voltage provided from the auto-zeroing controller; and
a counter suitable for counting a clock according to each output signal from the comparator.

6. An image sensing device, comprising:
a pixel array having a plurality of pixels for outputting pixel signals corresponding to incident light;
an analog-to-digital converter suitable for performing an analog-to-digital conversion on the pixel signals of the plurality of pixels on a row-by-row basis;
a ramp signal generator suitable for providing a ramp signal to the analog-to-digital converter;
an auto-zeroing controller suitable for providing a reference voltage to the analog-to-digital converter to perform an auto-zeroing operation by using a row pixel on which a readout operation is completed by the analog-to-digital converter; and
a column readout circuit suitable for outputting pixel data under a control of the controller.

7. The image sensing device of claim 6 , wherein the analog-to-digital converter includes:
a comparator suitable for comparing each pixel signal provided from the pixel array with the ramp signal provided from the ramp signal generator according to an auto-zeroing signal provided from the auto-zeroing controller; and
a counter suitable for counting a clock according to each output signal from the comparator.

8. The image sensing device of claim 7 ,
wherein the auto-zeroing controller is further suitable for blocking the auto-zeroing signal provided to the comparator so that the pixel signal of the row pixel is applied, as the reference signal, to one input terminal of the comparator, and
wherein the ramp signal generator provides the ramp signal, as an auto-zeroing reference voltage, to the other input terminal of the comparator.

9. The image sensing device of claim 7 , wherein the auto-zeroing controller is further suitable for generating an initialization signal to initialize the auto-zeroing operation.

10. The image sensing device of claim 9 , further comprising a controller suitable for increasing a voltage of the ramp signal generator by a preset offset to convert the output of the comparator to a logic high state.

11. The image sensing device of claim 9 , further comprising a controller suitable for operating the analog-to-digital converter to store, in a memory, a conversion result of a reset voltage of a reset transistor of each pixel.

12. The image sensing device of claim 6 , wherein when a first row pixel among the pixels is a dummy row pixel, the auto-zeroing controller blocks the auto-zeroing signal and performs an auto-zeroing operation on the first row pixel instead of the row pixel on which the readout operation is completed.

13. The image sensing device of claim 6 , wherein each of the pixels is formed of a three-transistor structure.

14. A method for operating an image sensing device in which a pixel signal provided from a pixel array including a plurality of pixels is converted through an analog-to-digital converter and output as a pixel data, the method comprising:
performing a flushing operation of flushing a photodiode and a floating node in each of the pixels by closing a reset transistor provided in each of the pixels;
performing an integration operation of accumulating, in the floating node, charges generated during exposure to light by opening reset transistor; and
performing an auto-zeroing operation of providing an auto-zeroing reference voltage by using a row pixel of the plurality of pixels on which a readout operation is completed by the analog-to-digital converter among the pixels.

15. The method of claim 14 ,
wherein the performing of the auto-zeroing operation includes applying, as the reference voltage, a pixel signal of the row pixel on which the readout operation is completed to one input terminal of the analog-to-digital converter by blocking an auto-zeroing signal provided to the analog-to-digital converter, and
wherein the performing of the auto-zeroing operation further includes providing a ramp signal, as an auto-zeroing reference signal, to the other input terminal of the analog-to-digital converter.

16. The method of claim 15 , wherein the performing of the auto-zeroing operation further includes flushing the floating node of the row pixel on which the readout operation is completed by closing the reset transistor of the row pixel on which the readout operation is completed while a selection transistor of the row pixel on which the readout operation is completed is closed.

17. The method of claim 16 , further comprising generating an initialization signal to initialize the auto-zeroing operation.

18. The method of claim 16 , further comprising increasing a voltage of the ramp signal by a preset offset to convert output of a comparator to a logic high state.

Assignees

• Sk Hynix Inc

Inventors

• Jeon Jin Uk
• Kwon Oh Jun
• Kim Jin Seon
• Kim Hak Soon
• Kim Han Sang
• Seo Kang Bong
• Seo Sung Uk
• Song Jeong Eun
• Shin Min Seok
• Lee Sun Young
• Lee Eun Chang
• Lee Hoo Chan

Classifications

• H03M1/56 Primary

  Input signal compared with linear ramp · CPC title

• H04N25/78

  Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters · CPC title

• H03M1/123

  Simultaneous, i.e. using one converter per channel but with common control or reference circuits for multiple converters · CPC title

• H03M1/0607 Primary

  Offset or drift compensation (removal of offset already present on the analogue input signal H03M1/1295) · CPC title

• H04N25/772

  comprising A/D, V/T, V/F, I/T or I/F converters · CPC title