Doorbell chime bypass circuit

Patent metadata

Field	Value
Publication number	US-11645894-B2
Application number	US-202117156438-A
Country	US
Kind code	B2
Filing date	Jan 22, 2021
Priority date	Jan 22, 2021
Publication date	May 9, 2023
Grant date	May 9, 2023

Abstract

A doorbell chime bypass circuit includes a first node, a second node, and a bi-directional FET switch in series with the first node and the second current node. The bi-directional FET switch includes a first FET and a second FET in series, and is configured to cease conducting current between the first and second nodes when gate voltages of the first and second FETs are below a cut-off threshold. The bypass circuit further includes a sensing circuit configured to determine a level of current flowing through the bi-directional FET switch, and a switch controller configured to set the gate voltages of the first and second FETs to a level below the cut-off threshold when the sensing circuit senses that the level of current meets a doorbell press current threshold, causing the bi-directional FET switch to cease conducting current between the first and second nodes.

First claim

What is claimed is:

1. A doorbell chime bypass circuit, comprising:
a first current input/output node;
a second current input/output node; and
a solid state relay (SSR) integrated circuit including:
a first bi-directional field effect transistor (FET) switch in series with the first current input/output node and the second current input/output node, the first bi-directional FET switch:
including a first FET and a second FET in series, and
configured to cease conducting current between the first current input/output node and the second current input/output node when a gate voltage of the first FET and a gate voltage of the second FET are below a cut-off threshold;

a first sensing circuit configured to determine a level of current flowing through the first bi-directional FET switch; and
a first switch controller configured to set the gate voltage of the first FET and the gate voltage of the second FET to a level below the cut-off threshold when the first sensing circuit senses that the level of current meets a doorbell press current threshold, causing the first bi-directional FET switch to cease conducting current between the first current input/output node and the second current input/output node.

2. The doorbell chime bypass circuit of claim 1 , wherein:
the doorbell chime bypass circuit further comprises a power conversion circuit;
the SSR integrated circuit further includes:
a second bi-directional FET switch in series with the first current input/output node and the power conversion circuit, the second bi-directional FET switch:
including a third FET and a fourth FET in series, and
configured to cease conducting current between the first current input/output node and the power conversion circuit when a gate voltage of the third FET and a gate voltage of the fourth FET are below the cut-off threshold; and

a second sensing circuit configured to determine a voltage across the second bi-directional FET switch; and
a second switch controller configured to set the gate voltage of the third FET and the gate voltage of the fourth FET to a level corresponding to that of the gate voltage of the first FET and the gate voltage of the second FET; and

the first switch controller is further configured to set the gate voltage of the first FET and the gate voltage of the second FET to a level above the cut-off threshold when the second sensing circuit senses that the voltage across the second bi-directional FET switch is below a doorbell release voltage threshold, causing the first bi-directional FET switch to conduct current between the first current input/output node and the second current input/output node.

3. The doorbell chime bypass circuit of claim 2 , wherein:
the doorbell chime bypass circuit is configured for electronic coupling to a doorbell chime via the first current input/output node and the second current input/output node; and
current conducting between the first current input/output node and the second current input/output node bypasses the doorbell chime, causing the doorbell chime to forgo actuation.

4. The doorbell chime bypass circuit of claim 1 , wherein:
the SSR integrated circuit further includes:
a second bi-directional FET switch in parallel with the first bi-directional FET switch, the second bi-directional FET switch:
including a third FET and a fourth FET in series, and
configured to cease conducting current between the first current input/output node and the second current input/output node when a gate voltage of the third FET and a gate voltage of the fourth FET are below the cut-off threshold; and

a second switch controller configured to set the gate voltage of the third FET and the gate voltage of the fourth FET to a level corresponding to that of the gate voltage of the first FET and the gate voltage of the second FET.

5. The doorbell chime bypass circuit of claim 1 , wherein:
the first switch controller is further configured to detect voltage zero-crossing events at the first bi-directional FET switch; and
the SSR integrated circuit further includes digital control circuitry configured to cause the first FET and the second FET to cease conducting current between the first current input/output node and the second current input/output node within a threshold of time of a detected zero-crossing event.

6. The doorbell chime bypass circuit of claim 1 , wherein:
the first switch controller is further configured to detect voltage peaks at the first bi-directional FET switch; and
the SSR integrated circuit further includes digital control circuitry configured to cause the first FET and the second FET to commence conducting current between the first current input/output node and the second current input/output node within a threshold of time of a detected voltage peak.

7. The doorbell chime bypass circuit of claim 1 , wherein:
the first switch controller is further configured to determine a direction of current flowing through the first bi-directional FET switch; and
the SSR integrated circuit further includes digital control circuitry configured to:
cause the first FET to turn off before the second FET turns off in accordance with a determination that current is flowing from the first FET to the second FET; and
cause the second FET to turn off before the first FET turns off in accordance with a determination that current is flowing from the second FET to the first FET.

8. The doorbell chime bypass circuit of claim 1 , wherein:
the first switch controller is further configured to determine relative voltage potentials at a drain of the first FET and a drain of the second FET; and
the SSR integrated circuit further includes digital control circuitry configured to:
cause the second FET to turn on before the first FET turns on in accordance with a determination that a voltage potential at the drain of the first FET is higher than a voltage potential at the drain of the second FET; and
cause the first FET to turn on before the second FET turns on in accordance with a determination that a voltage potential at the drain of the second FET is higher than a voltage potential at the drain of the first FET.

9. The doorbell chime bypass circuit of claim 1 , wherein:
the first sensing circuit is configured to detect a level of current flowing through the first bi-directional FET switch while the first FET and the second FET are on; and
the SSR integrated circuit further includes digital control circuitry configured to cause circuitry powering the first bi-directional FET switch to power down in accordance with a detected level of current exceeding an over-current threshold.

10. The doorbell chime bypass circuit of claim 1 , wherein:
the first sensing circuit is configured to detect a voltage across the first bi-directional FET switch while the first FET and the second FET are off; and
the SSR integrated circuit further includes digital control circuitry configured to cause circuitry powering the first bi-directional FET switch to power down in accordance with a detected voltage across the first bi-directional FET switch exceeding:
a first over-voltage threshold within a first time period after the first FET and the second FET have been turned off, or
a second over-voltage threshold lower than the first over-voltage threshold following the first time period.

11. The doorbell chime bypass circuit of claim 1 , wherein:
the SSR integrated circuit further includes:
a temperature sensor configured to detect a temperature proximate to the first bi-directional FET switch; and
digital control circuitry configured to cause circuitry powering the first bi-directional FET switch to power down in accordance with a detected temperature proxi

Assignees

• Google Llc

Inventors

• Warren Daniel Adam
• Marschalkowski Eric
• Conner Brian

Classifications

• H03K17/0822 Primary

  in field-effect transistor switches · CPC title

• G10K1/08

  Details or accessories of general applicability · CPC title

• G08B3/10 Primary

  using electric transmission; using electromagnetic transmission · CPC title

• H03K2017/0806

  against excessive temperature · CPC title

• H03K17/122

  in field-effect transistor switches · CPC title