Simplified frequency-domain filter adaptation window

Patent metadata

Field	Value
Publication number	US-11632147-B2
Application number	US-202117444954-A
Country	US
Kind code	B2
Filing date	Aug 12, 2021
Priority date	Aug 13, 2020
Publication date	Apr 18, 2023
Grant date	Apr 18, 2023

Abstract

A physical layer transceiver for a data channel includes receiver circuitry configured to receive signals on the data channel, transmit circuitry configured to transmit signals onto the data channel, and adaptive filter circuitry coupled to the receiver circuitry and the transmit circuitry and configured to filter the data channel by operating on input frequency-domain data samples to output filtered data samples. The adaptive filter circuitry includes error sample generation circuitry configured to generate error samples representing a difference between a target response and the filtered data samples, arithmetic-only circuitry configured to approximate a windowing function to operate on the error samples, and output sample generation circuitry configured to operate on windowed error samples to provide the output filtered data samples. The comparison circuitry may be configured for time-domain operation and may further be configured to transform the error signals into frequency-domain error signals.

First claim

What is claimed is:

1. A physical layer transceiver for a data channel, the physical layer transceiver comprising:
receiver circuitry configured to receive signals that arrive on the data channel;
transmit circuitry configured to transmit signals onto the data channel; and
adaptive filter circuitry coupled to the receiver circuitry and the transmit circuitry and configured to filter the data channel by operating on input frequency-domain data samples to output filtered data samples, the adaptive filter circuitry comprising:
error sample generation circuitry configured to generate error samples representing a difference between a target response and the filtered data samples, the error sample generation circuitry comprising:
comparison circuitry configured to generate error signals representing a difference between a target response and the filtered data samples, and
combining circuitry configured to combine the error signals with processed signals derived from the input frequency-domain data samples to provide the samples of a gradient of a cost function to be minimized;

arithmetic-only circuitry configured to approximate a windowing function to operate on the cost function gradient samples to provide windowed error samples; and
output sample generation circuitry configured to operate on the windowed error samples to provide the output filtered data samples.

2. The physical layer transceiver of claim 1 wherein:
the comparison circuitry is configured for time-domain operation and is further configured to transform the error signals into frequency-domain error signals.

3. The physical layer transceiver of claim 2 wherein the comparison circuitry comprises Fast Fourier Transform circuitry configured to transform the error signals into frequency-domain error signals.

4. The physical layer transceiver of claim 1 wherein the output sample generation circuitry comprises:
accumulator circuitry configured to generate filter coefficients from the windowed error samples output by the arithmetic-only circuitry; and
output circuitry configured to combine the filter coefficients with the input frequency-domain data samples to provide the output filtered data samples.

5. The physical layer transceiver of claim 1 wherein:
the adaptive filter circuitry operates on a portion of the data channel; and
the error sample generation circuitry is configured to generate error samples that also represent a difference between the target response and filtered data samples output by other adaptive filter circuitry operating on another portion of the data channel.

6. The physical layer transceiver of claim 1 wherein the arithmetic-only circuitry is configured to implement a sum of sinusoidal functions.

7. The physical layer transceiver of claim 6 wherein the arithmetic-only circuitry is configured to approximate a windowing function that is a square window.

8. The physical layer transceiver of claim 7 wherein the arithmetic-only circuitry is configured to implement a sum of a first sine function and odd harmonics of the first sine function.

9. The physical layer transceiver of claim 8 wherein the arithmetic-only circuitry comprises:
for the first sine function, first multiplication circuitry configured to multiply the error samples by a first constant;
for each respective odd harmonic of the first sine function:
respective additional multiplication circuitry configured to multiply the error samples by a respective complex constant,
respective first circular shifting circuitry configured to circularly shift output of the respective additional multiplication circuitry in a first direction, and respective second circular shifting circuitry configured to circularly shift output of the respective additional multiplication circuitry in a second direction opposite the first direction; and
vector summing circuitry configured to performed a signed summing operation on outputs of the first multiplication circuitry, the respective first circular shifting circuitry and the respective second circular shifting circuitry.

10. The physical layer transceiver circuitry of claim 9 wherein:
the respective first circular shifting circuitry is configured to circularly shift the output of the respective additional multiplication circuitry in the first direction by a shifting amount, and
the respective second circular shifting circuitry is configured to circularly shift the output of the respective additional multiplication circuitry in the second direction by the shifting amount.

11. The physical layer transceiver of claim 1 wherein the output sample generation circuitry is further configured to transform the output filtered data samples into time-domain output filtered data samples.

12. The physical layer transceiver of claim 11 wherein the output sample generation circuitry comprises Inverse Fast Fourier Transform circuitry configured to transform the output filtered data samples into time-domain output filtered data samples.

13. A method of adaptively filtering signals on a data channel by operating on input frequency-domain data samples to output filtered data samples, the method comprising:
comparing a target response and the filtered data samples to generate error samples representing a difference between the target response and the filtered data samples by processing the error samples to provide samples of a gradient of a cost function to be minimized;
approximating, using only arithmetic functions, a windowing function to operate on the cost function gradient samples to provide windowed error samples; and
operating on the windowed error samples to provide the output filtered data samples.

14. The method of claim 13 wherein operating on the windowed error samples to provide the output filtered data samples comprises:
accumulating the windowed error samples to generate filter coefficients; and
combining the filter coefficients with the input frequency-domain data samples to provide the output filtered data samples.

15. The method of claim 13 wherein:
the method operates on portions of the data channel; and
for each portion, the comparing generates error signals that also represent a difference between the target response and filtered data samples output by operation of the method on another portion of the data channel.

16. The method claim 13 wherein the approximating comprises using only frequency-domain arithmetic functions to implement a sum of time-domain sinusoidal functions.

17. The method of claim 16 wherein the approximating comprises using only frequency-domain arithmetic functions to approximate a square window function.

18. The method of claim 17 wherein the approximating comprises using only frequency-domain arithmetic functions to implement a sum of a first time-domain sine function and odd harmonics of the first time-domain sine function.

19. The method of claim 18 wherein the approximating comprises:
for the first time-domain sine function, multiplying the combined samples in the frequency domain by a first constant;
for each respective odd harmonic of the first time-domain sine function:
multiplying the error samples by a respective complex constant,
circularly shifting, in a first direction, a respective output of multiplying the error samples by a respective complex constant, and
circularly shifting, in a second direction opposite the first direction, a respective output of multiplying the error samples by a respective complex constant; and
performing a signed summing operation on outputs of (1) the mult

Assignees

• Marvell Asia Pte Ltd

Inventors

• Han Kuoruey
• Mcclellan Brett
• Yang Leon

Classifications

• H04B3/146

  using phase-frequency equalisers · CPC title

• G06F17/14

  Fourier, Walsh or analogous domain transformations {, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms (for correlation function computation G06F17/156; spectrum analysers G01R23/16)} · CPC title

• H04B3/544 Primary

  Setting up communications; Call and signalling arrangements · CPC title

• H04B3/21 Primary

  using a set of bandfilters · CPC title

• H04B1/40 Primary

  Circuits · CPC title