Display panel and display device with blocking metal wire in control unit

Patent metadata

Field	Value
Publication number	US-11630333-B2
Application number	US-201916460444-A
Country	US
Kind code	B2
Filing date	Jul 2, 2019
Priority date	Mar 29, 2019
Publication date	Apr 18, 2023
Grant date	Apr 18, 2023

Abstract

Display panel and display device are provided. The display panel includes a plurality of pixels and a blocking metal wire. The pixel includes a display unit and a control unit driving the display unit. The display unit at least includes a heating element and a phase change material layer. The heating element includes a first connecting terminal and a second connecting terminal. The control unit includes a first signal terminal and a second signal terminal. The control unit includes at least one diode, which includes a diode semiconductor layer including a first electrode contact region, a second electrode contact region and a connecting region. The blocking metal wire covers the connecting region and is insulated from the connecting region. The blocking metal wire is electrically connected to each of the first signal terminal and the first signal source or to each of the second connecting terminal and the second signal source.

First claim

What is claimed is:

1. A display panel, comprising:
a plurality of pixels, and
a blocking metal wire,
wherein:
a pixel of the plurality of pixels includes a display unit and a control unit driving the display unit, the display unit at least includes a heating element and a phase change material layer over the heating element, and the control unit is disposed under the display unit and over a substrate;
the heating element includes a first connecting terminal and a second connecting terminal;
the control unit includes a first signal terminal and a second signal terminal;
the first signal terminal is electrically connected to a first signal source, the second signal terminal is electrically connected to the first connecting terminal, and the second connecting terminal is electrically connected to a second signal source;
the control unit includes at least one diode, and the diode includes a diode semiconductor layer including a first electrode contact region, a second electrode contact region and a connecting region between the first electrode contact region and the second electrode contact region;
the blocking metal wire is disposed on a side of the at least one diode away from the substrate and covers the connecting region in a direction perpendicular to the display panel and is insulated from the connecting region; and
the blocking metal wire is electrically connected to each of the first signal terminal and the first signal source, or the blocking metal wire is electrically connected to each of the second connecting terminal and the second signal source.

2. The display panel according to claim 1 , wherein:
one end of the diode is the first signal terminal and another end is the second signal terminal.

3. The display panel according to claim 1 , wherein:
the plurality of the pixels is arranged in a first direction as a pixel row, and the plurality of the pixels is arranged in a second direction as a pixel column, wherein the first direction intersects the second direction;
the blocking metal wire extends along the first direction, and control units of the plurality of the pixels in a same pixel row are electrically connected to a same blocking metal wire; and
the display panel further includes second signal lines extending in the second direction, and second connecting terminals of heating elements of the plurality of the pixels in a same pixel column are electrically connected to a same second signal line.

4. The display panel according to claim 1 , wherein:
the plurality of the pixels is arranged in a first direction as a pixel row, and the plurality of the pixels is arranged in a second direction as a pixel column, wherein the first direction intersects the second direction;
the display panel further includes first signal lines extending in the first direction, and control units of the plurality of the pixels in a same pixel row are electrically connected to a same first signal line; and
the blocking metal wire extends along the second direction, and second connecting terminals of heating elements of the plurality of the pixels in a same pixel column are electrically connected to a same blocking metal wire.

5. The display panel according to claim 1 , further including switch units, wherein:
the switch units include first switch units and second switch units;
a control terminal of a first switch unit is electrically connected to a first switch signal source;
a first terminal of the first switch unit is electrically connected to the first signal terminal;
a second terminal of the first switch unit is electrically connected to the first signal source;
a control terminal of a second switch unit is electrically connected to a second switch signal source;
a first terminal of the second switch unit is electrically connected to the second connecting terminal; and
a second terminal of the second switch unit is electrically connected to the second signal source.

6. The display panel according to claim 5 , wherein:
each switch unit includes at least one switch transistor, wherein the switch transistor includes a transistor semiconductor layer over the substrate, a gate on a side of the transistor semiconductor layer away from the substrate, and a source and a drain on a side of the gate away from the transistor semiconductor layer;
the diode further includes a first electrode and a second electrode, wherein the first electrode is electrically connected to the first electrode contact region, the second electrode is electrically connected to the second electrode contact region, and the first electrode and the second electrode are on a side of the diode semiconductor layer away from the substrate; and
in at least one switch transistor, the transistor semiconductor layer and the diode semiconductor layer are in a same film layer; the first electrode, the second electrode, the source and the drain are in a same film layer; and the blocking metal wire and the gate are in a same film layer.

7. The display panel according to claim 6 , wherein:
a width to length ratio of a channel region of the switch transistor is m≥10.

8. The display panel according to claim 5 , wherein:
the plurality of the pixels is arranged in a first direction as a pixel row, and the plurality of the pixels is arranged in a second direction as a pixel column, wherein the first direction intersects the second direction;
the first signal terminals of the control units of the plurality of the pixels in a same pixel row are electrically connected to a same first switch unit; and
the second connecting terminals of the heating elements of the plurality of the pixels at a same pixel column are electrically connected to a same second switch unit.

9. The display panel according to claim 8 , further including control lines and signal buses wherein:
the control lines include first control lines and second control lines, and the signal buses include row signal buses and column signal buses;
the control terminal of the first switch unit is connected to a first control line of the first control lines, and the second terminal of the first switch unit is connected to a row signal bus of the row signal buses; and
the control terminal of the second switch unit is connected to a second control line of the second control lines, and the second terminal of the second switch unit is connected to a column signal bus of the column signal buses.

10. The display panel according to claim 9 , wherein:
the second terminals of all the first switch units are connected to a same row signal bus, and the second terminals of all the second switch units are connected to a same column signal bus.

11. The display panel according to claim 9 , wherein:
the control terminal of each first switch unit is connected to a different first control line and the control terminal of each second switch unit is connected to a different second control line.

12. The display panel according to claim 1 , wherein:
the diode semiconductor layer is made by a material including an intrinsic polycrystalline silicon material, wherein:
the first electrode contact region is doped with boron, and the second electrode contact region is doped with phosphorus; the connecting region further includes a doped channel region and an intrinsic region; the doped channel region is doped with boron; and a boron doping concentration of the doped channel region is less than a boron doping concentration of the first electrode contact region; and
in a direction from the first electrode contact region to the second electrode contact region, the first electrode contact region, the doped channel region, the intrinsic region and the second electrode

Assignees

• Shanghai Tianma Micro Elect Co

Inventors

• Ma Shaolong
• Lu Feng
• Yao Qijun

Classifications

• H10D86/441

  Interconnections, e.g. scanning lines · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title

• H10D86/40

  characterised by multiple TFTs · CPC title

• G02F1/132

  Thermal activation of liquid crystals exhibiting a thermo-optic effect · CPC title

• H10N70/231

  based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect · CPC title