Method and memory used for reducing program disturbance by adjusting voltage of dummy word line

Patent metadata

Field	Value
Publication number	US-11626170-B2
Application number	US-202117187651-A
Country	US
Kind code	B2
Filing date	Feb 26, 2021
Priority date	Dec 9, 2019
Publication date	Apr 11, 2023
Grant date	Apr 11, 2023

Abstract

A memory includes an upper deck and a lower deck. The upper deck includes a first upper dummy word line. The lower deck includes a first lower dummy word line. A method for reducing program disturbance of the memory includes adjusting a first upper bias voltage applied to the first upper dummy word line and/or a first upper threshold voltage of the first upper dummy word line to adjust a first difference between the first upper bias voltage and the first upper threshold voltage; and adjusting a first lower bias voltage applied to the first lower dummy word line and/or a first lower threshold voltage of the first lower dummy word line to adjust a second difference between the first lower bias voltage and the first lower threshold voltage.

First claim

What is claimed is:

1. A method for operating a memory, the memory comprising an upper deck and a lower deck, the upper deck being formed above the lower deck, the upper deck comprising a first upper dummy word line close to the lower deck, the lower deck comprising a first lower dummy word line close to the upper deck, the method comprising:
applying a first upper bias voltage to the first upper dummy word line, wherein the first upper bias voltage is different from a first upper threshold voltage of a first upper dummy cell corresponding to the first upper dummy word line; and
applying a first lower bias voltage to the first lower dummy word line, wherein the first lower bias voltage is different from a first lower threshold voltage of a first lower dummy cell corresponding to the first lower dummy word line.

2. The method of claim 1 , wherein:
a first difference between the first upper bias voltage and the first upper threshold voltage is lower than a first threshold; and
a second difference between the first lower bias voltage and the first lower threshold voltage is lower than the first threshold.

3. The method of claim 2 , wherein:
the first difference is higher than the second difference.

4. The method of claim 1 , wherein the lower deck further comprises a second lower dummy word line farther to the upper deck than the first lower dummy word line, the method further comprising:
applying a second lower bias voltage to the second lower dummy word line, wherein the second lower bias voltage is different from a second lower threshold voltage of a second lower dummy cell corresponding to the second lower dummy word line.

5. The method of claim 4 , wherein:
a first difference between the first upper bias voltage and the first upper threshold voltage is higher than a first threshold;
a second difference between the first lower bias voltage and the first lower threshold voltage is lower than the first threshold; and
a third difference between the second lower bias voltage and the second lower threshold voltage is lower than the first threshold.

6. The method of claim 5 , wherein a difference between the first difference and the second difference is within a predetermined range, and another difference between the first difference and the third difference is within the predetermined range.

7. The method of claim 1 , wherein the upper deck further comprises a second upper dummy word line farther to the lower deck than the first upper dummy word line, the method further comprising:
applying a second upper bias voltage to the second upper dummy word line, wherein the second upper bias voltage is different from a second upper threshold voltage of a second upper dummy cell corresponding to the second upper dummy word line.

8. The method of claim 7 , wherein:
a first difference between the first upper bias voltage and the first upper threshold voltage is lower than a first threshold;
a second difference between the first lower bias voltage and the first lower threshold voltage is lower than the first threshold; and
a fourth difference between the second upper bias voltage and the second upper threshold voltage is higher than the first threshold.

9. The method of claim 8 , wherein a difference between the fourth difference and the first difference is within a predetermined range, and another difference between the fourth difference and the second difference is within the predetermined range.

10. The method of claim 1 , wherein the upper deck further comprises a second upper dummy word line farther to the lower deck than the first upper dummy word line, the lower deck further comprises a second lower dummy word line farther to the upper deck than the first lower dummy word line, the method further comprising:
applying a second lower bias voltage to the second lower dummy word line, wherein the second lower bias voltage is different from a second lower threshold voltage of a second lower dummy cell corresponding to the second lower dummy word line; and
applying a second upper bias voltage to the second upper dummy word line, wherein the second upper bias voltage is different from a second upper threshold voltage of a second upper dummy cell corresponding to the second upper dummy word line.

11. The method of claim 10 , wherein:
a first difference between the first upper bias voltage and the first upper threshold voltage is lower than a first threshold;
a second difference between the first lower bias voltage and the first lower threshold voltage is lower than a second threshold;
a third difference between the second lower bias voltage and the second lower threshold voltage is lower than the first threshold; and
a fourth difference between the second upper bias voltage and the second upper threshold voltage is higher than the second threshold.

12. The method of claim 11 , wherein a difference between the fourth difference and the first difference is within a predetermined range, and another difference between the fourth difference and the second difference is within the predetermined range.

13. The method of claim 11 , wherein a difference between the fourth difference and the second difference is within a predetermined range, and another difference between the fourth difference and the third difference is within the predetermined range.

14. The method of claim 1 , further comprising:
adjusting the first upper threshold voltage of the first upper dummy cell corresponding to the first upper dummy word line such that the first upper bias voltage is different from the first upper threshold voltage; and
adjusting the first lower threshold voltage of the first lower dummy cell corresponding to the first lower dummy word line such that the first lower bias voltage is different from the first upper threshold voltage,
wherein the first upper bias voltage is the same as the first lower bias voltage, and first upper threshold voltage is different from the first lower threshold voltage.

15. The method of claim 1 , wherein the first upper threshold voltage of the first upper dummy cell corresponding to the first upper dummy word line and the first lower threshold voltage of the first lower dummy cell corresponding to the first lower dummy word line are unadjusted.

16. A memory device, comprising:
an upper deck comprising a first upper dummy word line;
a lower deck comprising a first lower dummy word line, wherein the upper deck is above the lower deck; and
a driving circuit configured to:
apply a first upper bias voltage to the first upper dummy word line, wherein the first upper bias voltage is different from a first upper threshold voltage of a first upper dummy cell corresponding to the first upper dummy word line; and
apply a first lower bias voltage to the first lower dummy word line, wherein the first lower bias voltage is different from a first lower threshold voltage of a first lower dummy cell corresponding to the first lower dummy word line.

17. The memory device of claim 16 , wherein the lower deck further comprises a second lower dummy word line farther to the upper deck than the first lower dummy word line, and the driving circuit is further configured to:
apply a second lower bias voltage to the second lower dummy word line, wherein the second lower bias voltage is different from a second lower threshold voltage of a second lower dummy cell corresponding to the second lower dummy word line,
wherein a first difference between the first upper bias voltage and the first upper threshold voltage is higher than a second difference between the first lower

Assignees

• Yangtze Memory Tech Co Ltd

Inventors

• Song Yali
• Jia Jianquan
• You Kaikai
• Zhang An
• Zhao Xiangnan
• Cui Ying
• Li Shan
• Li Kaiwei
• Jin Lei
• Huang Xueqing
• Lou Meng
• Zhang Jinlong

Classifications

• G11C16/08

  Address circuits; Decoders; Word-line control circuits · CPC title

• G11C16/3431 Primary

  Circuits or methods to detect disturbed nonvolatile memory cells, e.g. which still read as programmed but with threshold less than the program verify threshold or read as erased but with threshold greater than the erase verify threshold, and to reverse the disturbance via a refreshing programming or erasing step · CPC title

• G11C16/3427 Primary

  Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written · CPC title

• G11C16/0483 Primary

  comprising cells having several storage transistors connected in series · CPC title

• H10B43/27

  the channels comprising vertical portions, e.g. U-shaped channels · CPC title