Adaptive cable equalizer

Patent metadata

Field	Value
Publication number	US-11616529-B2
Application number	US-202117175515-A
Country	US
Kind code	B2
Filing date	Feb 12, 2021
Priority date	Feb 12, 2021
Publication date	Mar 28, 2023
Grant date	Mar 28, 2023

Abstract

A cable equalizer configured as part of a cable comprising a first stage, a second stage, and a third stage. The first stage comprises a first stage bias current circuit configured to generate a bias current and a pre-emphasis module configured to introduce pre-emphasis into a received signal to counter the effects of signal amplification. Also part of the first stage is a bias voltage circuit configured to provide a bias voltage to the first stage. The second stage comprises a buffer configured impedance match the first stage. The third stage comprises a third stage bias current circuit configured to generate a bias current and a tank equalizer circuit configured to perform frequency specific equalization on a second stage signal. An amplifier is configured to amplify the second stage signal to create an amplified signal, which is output from the cable equalizer by an output driver.

First claim

What is claimed is:

1. A cable equalizer configured as part of a cable comprising:
a pre-emphasis stage comprising:
a pre-emphasis module configured to introduce pre-distortion into a received signal to counter the effects of subsequent processing;

an output stage comprising:
an equalizer circuit configured to perform frequency specific amplification on an output stage signal;
an output driver configured to perform impedance matching to the cable and output an equalized signal from the output stage to the cable;

a buffer configured impedance match the pre-emphasis stage and the output stage; and
one or more bias voltage circuits configured to provide one or more bias voltages to the pre-emphasis stage and the output stage.

2. The cable equalizer of claim 1 wherein the pre-emphasis module comprises diode connected transistors in series with one or more resistors.

3. The cable equalizer of claim 1 wherein the equalizer circuit comprises two or more capacitors that may be switched into or out of a tank equalizer circuit responsive to a control signal.

4. The cable equalizer of claim 1 wherein the equalizer circuit comprises a cascode common emitter transistor pair and cross-coupled capacitors.

5. The cable equalizer of claim 1 further comprising a pre-emphasis stage bias current circuit and an output stage bias current circuit both generate bias current based on a control signal that controls bias current.

6. A method for performing cable equalization comprising:
receiving a signal transmitted over a cable or to be transmitted over a cable;
performing pre-distortion processing with a pre-emphasis module on the signal to counter the effects of amplification to create a modified signal, wherein the pre-distortion processing counters the frequency specific effects of amplification;
buffering the modified signal with an intermediate stage to optimize return loss; and
equalizing the modified signal after buffering to counter effects on the signal from passing through the cable.

7. The method of claim 6 further comprising generating one or more bias currents with bias circuits provide bias current to enable pre-distortion processing and further comprising adjusting at least one of the one more bias currents to optimize cable equalization.

8. The method of claim 6 further comprising generating one or more amplification control signals which are used to adjust a capacitance to optimize cable equalization.

9. The method of claim 6 further comprising customizing amplification based on one or more high frequency control signals and one or more low frequency control signals.

10. A cable equalizer comprising:
a pre-emphasis stage comprising a pre-emphasis module configured to introduce pre-distortion into a received signal to counter the effects of an output stage;
the output stage comprising an equalizer circuit configured to perform frequency specific amplification;
a buffer between the pre-emphasis stage and the output stage to minimize return loss between the pre-distortion stage and the output stage; and
one or more bias current circuits configured to generate one or more bias currents based on one or more control signals that control the one or more bias currents.

11. The cable equalizer of claim 10 wherein the pre-emphasis module comprises diode connected transistors in series with one or more transistors.

12. The cable equalizer of claim 10 wherein the equalizer circuit comprises two or more capacitors that may be switched into or out of a tank equalizer circuit responsive to a control signal.

13. The cable equalizer of claim 10 wherein the equalizer circuit comprises a cascode common emitter transistor pair and cross-coupled capacitors.

14. The cable equalizer of claim 10 wherein the buffer comprises an emitter follower pair.

15. The cable equalizer of claim 10 wherein the buffer is configured to shunt high frequency signal components.

16. The cable equalizer of claim 10 wherein the output stage is further configured to perform output impedance matching.

Assignees

• Macom Tech Solutions Holdings Llc
• Macom Tech Solutions Holdings Inc

Inventors

• Ikram Quazi
• Doppalapudi Naga Rajesh
• Jafarlou Saman

Classifications

• H04B3/145 Primary

  variable equalisers · CPC title

• H04B3/06 Primary

  by the transmitted signal · CPC title