Array substrate and preparation method thereof, display panel and driving method thereof

US11614669B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11614669-B2
Application numberUS-202117183238-A
CountryUS
Kind codeB2
Filing dateFeb 23, 2021
Priority dateFeb 28, 2020
Publication dateMar 28, 2023
Grant dateMar 28, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

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The present disclosure provides an array substrate and a preparation method thereof, a display panel and a driving method thereof, which belongs to the field of display technology. The array substrate includes a base substrate, a driving circuit layer, a reflective electrode layer, a light-emitting layer, an electrochromic layer, and a common electrode layer. The driving circuit layer is provided with a first and second driving circuit. The reflective electrode layer is provided on a side of the driving circuit layer away from the base substrate and provided with a first and second reflective electrode insulated from each other. The light-emitting layer includes a light-emitting unit arranged on the surface of the second reflective electrode away from the base substrate. The electrochromic layer is arranged on the surface of the first reflective electrode away from the base substrate. The common electrode layer covers the electrochromic layer and the light-emitting unit.

First claim

Opening claim text (preview).

What is claimed is: 1. An array substrate, comprising: a base substrate; a driving circuit layer provided on a side of the base substrate, wherein the driving circuit layer is provided with a first driving circuit and a second driving circuit; a reflective electrode layer provided on a side of the driving circuit layer away from the base substrate, wherein the reflective electrode layer is provided with a first reflective electrode and a second reflective electrode, the first reflective electrode is electrically connected to an output terminal of the first driving circuit and insulated from the second reflective electrode, and the second reflective electrode is electrically connected to an output terminal of the second driving circuit; a light-emitting layer comprising a light-emitting unit disposed on a surface of the second reflective electrode away from the base substrate; an electrochromic layer provided on a surface of the first reflective electrode away from the base substrate; and a common electrode layer covering a surface of the electrochromic layer away from the base substrate and a surface of the light-emitting unit away from the base substrate, wherein the array substrate further comprises a pixel defining layer provided on a side of the driving circuit layer away from the base substrate, wherein the pixel defining layer is formed with a hollowed-out second pixel window, the second reflective electrode is arranged in the second pixel window, and the first reflective electrode covers a side of the pixel defining layer away from the base substrate, and wherein the light-emitting unit is a light-emitting diode, and the array substrate further comprises a passivation protection layer provided between the reflective electrode layer and the common electrode layer, wherein the passivation protection layer is formed with a hollowed-out third pixel window, and the light-emitting unit is embedded in the third pixel window. 2. The array substrate according to claim 1 , wherein an amount of the second reflective electrode is multiple, and the first reflective electrode is formed with a plurality of hollowed-out first pixel windows in one-to-one correspondence with each of the second reflective electrodes, and any one of the second reflective electrodes is arranged in the corresponding first pixel window. 3. The array substrate according to claim 1 , wherein the first reflective electrode is an integrated structure. 4. The array substrate according to claim 1 , wherein: a material of the electrochromic layer is a combination of one or more of tungsten oxide, molybdenum oxide, titanium oxide, vanadium oxide, and niobium oxide; or a material of the electrochromic layer is a combination of one or more of nickel oxide, iridium oxide, cobalt oxide, and rhodium oxide. 5. The array substrate according to claim 1 , wherein the first reflective electrode and the second reflective electrode has the same material and thickness. 6. The array substrate according to claim 1 , wherein an amount of the second reflective electrode is multiple, and a distance between any one of the second reflective electrode and the first reflective electrode is 1˜10 microns. 7. The array substrate according to claim 1 , wherein the common electrode layer is a transparent conductive electrode. 8. The array substrate according to claim 1 , wherein the array substrate further comprises a fingerprint identification layer provided on a side of the common electrode layer away from the base substrate. 9. A method for preparing an array substrate, comprising: providing a base substrate; forming a driving circuit layer on a side of the base substrate, wherein the driving circuit layer is provided with a first driving circuit and a second driving circuit; forming a reflective electrode layer on a side of the driving circuit layer away from the base substrate, wherein the reflective electrode layer is provided with a first reflective electrode and a second reflective electrode, the first reflective electrode is electrically connected to an output terminal of the first driving circuit and insulated from the second reflective electrode, and the second reflective electrode is electrically connected to an output terminal of the second driving circuit; forming a light-emitting layer, wherein the light-emitting layer comprises a light-emitting unit disposed on a surface of the second reflective electrode away from the base substrate, wherein the light-emitting unit is a light-emitting diode; forming an electrochromic layer, wherein the electrochromic layer covers a surface of the first reflective electrode away from the base substrate; forming a common electrode layer, wherein the common electrode layer covers a surface of the electrochromic layer away from the base substrate and a surface of the light-emitting unit away from the base substrate; forming a pixel defining layer on a side of the driving circuit layer away from the base substrate, wherein the pixel defining layer is formed with a hollowed-out second pixel window, the second reflective electrode is arranged in the second pixel window, and the first reflective electrode covers a side of the pixel defining layer away from the base substrate; and forming a passivation protection layer between the reflective electrode layer and the common electrode layer, wherein the passivation protection layer is formed with a hollowed-out third pixel window, and the light-emitting unit is embedded in the third pixel window. 10. A display panel, comprising an array substrate, wherein the array substrate comprises: a base substrate; a driving circuit layer provided on a side of the base substrate, wherein the driving circuit layer is provided with a first driving circuit and a second driving circuit; a reflective electrode layer provided on a side of the driving circuit layer away from the base substrate, wherein the reflective electrode layer is provided with a first reflective electrode and a second reflective electrode, the first reflective electrode is electrically connected to an output terminal of the first driving circuit and insulated from the second reflective electrode, and the second reflective electrode is electrically connected to an output terminal of the second driving circuit; a light-emitting layer comprising a light-emitting unit disposed on a surface of the second reflective electrode away from the base substrate; an electrochromic layer provided on a surface of the first reflective electrode away from the base substrate; and a common electrode layer covering a surface of the electrochromic layer away from the base substrate and a surface of the light-emitting unit away from the base substrate, wherein the array panel further comprises a pixel defining layer provided on a side of the driving circuit layer away from the base substrate, wherein the pixel defining layer is formed with a hollowed-out second pixel window, the second reflective electrode is arranged in the second pixel window, and the first reflective electrode covers a side of the pixel defining layer away from the base substrate, and wherein the light-emitting unit is a light-emitting diode, and the array panel further comprises a passivation protection layer provided between the reflective electrode layer and the common electrode layer, wherein the passivation protection layer is formed with a hollowed-out third pixel window, and the light-emitting unit is embedded in the third pixel window. 11. The display panel according to claim 10 , wherein an amount of the second reflective electrode is multiple, and the first reflective electrode is formed with a plurality of hollowed-out first pixel windows in

Assignees

Inventors

Classifications

  • Transition metal compounds · CPC title

  • Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00 · CPC title

  • Input devices, e.g. touch panels · CPC title

  • Reflecting elements (associated to illuminating devices G02F1/133605) · CPC title

  • Electrodes · CPC title

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What does patent US11614669B2 cover?
The present disclosure provides an array substrate and a preparation method thereof, a display panel and a driving method thereof, which belongs to the field of display technology. The array substrate includes a base substrate, a driving circuit layer, a reflective electrode layer, a light-emitting layer, an electrochromic layer, and a common electrode layer. The driving circuit layer is provid…
Who is the assignee on this patent?
Hefei Xinsheng Optoelectronics Technology Co Ltd, Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification G02F1/163. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 28 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).