Die for a printhead

Patent metadata

Field	Value
Publication number	US-11613118-B2
Application number	US-202217739866-A
Country	US
Kind code	B2
Filing date	May 9, 2022
Priority date	Feb 6, 2019
Publication date	Mar 28, 2023
Grant date	Mar 28, 2023

Abstract

A die for a printhead is provided in examples. The die includes a number of fluidic actuator arrays, proximate to a number of fluid feed holes. A number of address lines are disposed proximate to a number of logic circuits on a low-voltage side of the fluid feed holes. An address decoder circuit is coupled to at least a portion of the address lines to select a fluidic actuator in a fluidic actuator array for firing. The address decoder circuit is customized to select a different address for each fluidic actuator in the fluidic actuator array. A logic circuit triggers a driver circuit located in a high-voltage side of the plurality of fluid feed holes opposite the low-voltage side, based, at least in part, on a bit value for the fluidic actuator array, the fluidic actuator selected by the address decoder circuit, and a firing signal.

First claim

What is claimed is:

1. A die for a printhead, the die comprising:
a substrate having a central fluid feed region;
a first plurality of fluidic actuators forming a first array along a first side of the central fluid feed region;
a second plurality of fluidic actuators forming a second array along a second side of the central fluid feed region opposite the first side, the first and second arrays having a same address sequence layout, the first and second arrays being offset such that corresponding addresses in the first and second arrays are not aligned across the central fluid feed region;
a plurality of address lines, wherein respective ones of the address lines are shared between corresponding ones of the first and second plurality of fluidic actuators in the address sequence layout; and
an address decoder circuit coupled to the address lines to select a fluidic actuator for firing in respective ones of the first and second arrays.

2. The die of claim 1 , further including power field effect transistors (FETs) on the first side of the central fluid feed region to activate respective ones of the first and second plurality of fluidic actuators.

3. The die of claim 2 , wherein the address decoder circuit is on the second side of the central fluid feed region.

4. The die of claim 3 , further including cross-routings extending across the central fluid feed region between the address decoder circuit and the power FETs.

5. The die of claim 4 , further including power lines extending between corresponding ones of the power FETs and the first and second plurality of fluidic actuators, at least a portion of the power lines extending across the central fluid fed region.

6. The die of claim 5 , wherein the first side is a high-voltage side and the second side is a low-voltage side.

7. The die of claim 6 , further including logic circuitry on the second side of the central fluid feed region, the address decoder circuit including a plurality of vias that couple the address lines to the logic circuitry.

8. The die of claim 1 , wherein the central fluid feed region includes fluid feed holes extending through the substrate, the fluid feed holes to supply fluid to the first and second plurality of fluidic actuators.

9. The die of claim 1 , wherein the die is less than about 750 micrometers in width.

10. The die of claim 1 , further including a sense bus communicatively coupled to a multiplexer to communicatively couple a thermal sensor to the sense bus.

11. A method for forming a die for a printhead, the method comprising:
forming a central fluid feed region in a substrate; and
depositing a plurality of layers on the substrate to form:
a first plurality of fluidic actuators forming a first array along a first side of the central fluid feed region;
a second plurality of fluidic actuators forming a second array along a second side of the central fluid feed region opposite the first side;
a plurality of address lines, wherein respective ones of the address lines are shared between corresponding ones of the first and second plurality of actuators, and wherein the address lines are arranged such that corresponding ones of the first and second plurality of actuators that share an address line are offset on the first and second sides; and
an address decoder circuit coupled to the address lines to select a fluidic actuator for firing in respective ones of the first and second arrays.

12. The method of claim 11 , wherein forming the central fluid feed region includes etching a plurality of fluid feed holes through the substrate.

13. The method of claim 12 , further including forming a plurality of vias after the plurality of layers are formed on the substrate, wherein the plurality of vias electrically couple the address lines to the address decoder circuit.

14. The method of claim 11 , further including depositing layers to form mapped power connections from a logic circuit to a plurality of field-effect transistors (FETs) that power respective ones of the first and second plurality of fluidic actuators.

15. The method of claim 14 , wherein the plurality of FETs are on the first side of the central fluid feed region and the logic circuit is on the second side of the central fluid feed region.

16. The method of claim 15 , wherein the first side is a high-voltage side and the second side is a low-voltage side.

17. A printhead comprising:
a die including:
a substrate having a central fluid feed region;
a first set of fluidic actuators forming a first primitive, the first set of fluidic actuators disposed on a first side of the central fluid feed region;
a second set of fluidic actuators forming a second primitive, the second set of fluidic actuators disposed on a second side of the central fluid feed region opposite the first side, wherein an address order of the first set of fluidic actuators is offset from an address order of the second set of fluidic actuators such that corresponding addresses on the first and second sides are not aligned across the central fluid feed region;
a set of address lines, wherein respective ones of the address lines are shared between corresponding ones of the first and second sets of fluidic actuators; and
an address decoder circuit coupled to the set of address lines to select a fluidic actuator for firing in the first and second sets of fluidic actuators.

18. The printhead of claim 17 , wherein the central fluid feed region includes a plurality of fluid feed holes extending through the substrate.

19. The printhead of claim 18 , further including a polymeric mount, the die disposed in a recess formed in a first side of the polymeric mount, and wherein the polymeric mount has a slot in a back side of the polymeric mount to provide fluid to the die.

20. The printhead of claim 18 , further including traces between the fluid feed holes to electrically couple circuitry on the first side and the second side.

Assignees

• Hewlett Packard Development Co

Inventors

• Martin Eric
• Linn Scott A
• Gardner James Michael

Classifications

• B41J2/04543 Primary

  Block driving · CPC title

• B41J2/14072

  Electrical connections, e.g. details on electrodes, connecting the chip to the outside... · CPC title

• B41J2/04581

  controlling heads based on piezoelectric elements · CPC title

• B41J2/04545

  Dynamic block driving · CPC title

• B41J2/1607

  Production of print heads with piezoelectric elements (B41J2/1606, B41J2/162 take precedence) · CPC title