Carrier frequency error estimator with banked correlators

Patent metadata

Field	Value
Publication number	US-11611460-B2
Application number	US-202117181391-A
Country	US
Kind code	B2
Filing date	Feb 22, 2021
Priority date	Sep 22, 2020
Publication date	Mar 21, 2023
Grant date	Mar 21, 2023

Abstract

An apparatus and method for carrier frequency estimation include a carrier frequency estimator having: a frequency input terminal disposed to receive a frequency-domain input signal comprising a plurality of symbols; a plurality of candidate pipelines, each comprising a frequency adder coupled to the frequency input terminal, a bit converter coupled to the frequency adder, a multi-bit buffer coupled to the bit converter; and a correlator coupled to the multi-bit buffer, respectively; and a candidate pipeline selector coupled to the correlators.

First claim

What is claimed is:

1. A carrier frequency estimator comprising:
a frequency input terminal disposed to receive a frequency-domain input signal comprising a plurality of symbols;
a plurality of candidate pipelines, each comprising a frequency adder coupled to the frequency input terminal, a bit converter coupled to the frequency adder, a multi-bit buffer coupled to the bit converter and configured to select a plurality of bits corresponding to at least one bit per symbol to match a number of bits in a reference code, and a correlator coupled to the multi-bit buffer and configured to correlate the selected plurality of bits with the reference code, respectively; and
a candidate pipeline selector coupled to the correlators,
wherein the selected plurality of bits is less than a converted plurality of bits from the bit converter, and the selected bits are non-consecutive.

2. The estimator of claim 1 , wherein:
each of the frequency adders has a predefined frequency offset relative to an adjacent adder.

3. The estimator of claim 1 , wherein the plurality of candidate pipelines are arranged in parallel with each other.

4. The estimator of claim 1 , wherein each of the multi-bit buffers is a first-in first-out (FIFO) buffer.

5. The estimator of claim 1 , wherein each of the multi-bit buffers has a bit length greater than or equal to a positive integer divisor of at least one of a pre-amble, a mid-amble, or a communications code of the input signal.

6. The estimator of claim 1 , wherein each of the correlators comprises a single-bit correlator that is configured to correlate a plurality of bits, corresponding to at least one bit per symbol, with at least five bits of a pre-amble derived from the input signal.

7. The estimator of claim 1 , wherein the selector is configured to select one of the plurality of candidate pipelines having a greatest correlation.

8. A method of carrier frequency estimation comprising:
receiving a frequency-domain input signal comprising a plurality of symbols;
splitting the received frequency-domain input signal into a plurality of streams;
adding a different candidate frequency error to each stream;
converting each stream into a respective plurality of bits;
storing the respective plurality of bits into a buffer at an integer multiple of a symbol rate of the plurality of symbols;
selecting a plurality of bits corresponding to at least one bit per symbol from each buffer for each respective stream to match a number of bits in a reference code;
correlating the selected plurality of bits of each stream with the reference code; and
selecting one of the plurality of streams having the greatest correlation as a basis for the carrier frequency estimation,
wherein the selected plurality of bits is less than the converted plurality of bits, and the selected bits are non-consecutive.

9. The method of claim 8 , further comprising:
receiving in-phase/quadrature-valued input data;
converting the in-phase/quadrature-valued input data into phase data; and
converting the phase data into the frequency-domain input signal.

10. The method of claim 8 , further comprising down-sampling the frequency-domain input signal.

11. The method of claim 8 , wherein:
adding a different candidate frequency error to each stream comprises adding substantially evenly spaced candidate frequency errors to the respective streams.

12. The method of claim 8 , wherein adding a different candidate frequency error to each stream comprises adding unevenly spaced candidate frequency errors to the respective streams based on a probability distribution of expected carrier frequency differences between a transmitter and a receiver.

13. The method of claim 8 , wherein converting each stream into a respective plurality of bits comprises basing each bit decision on a sign of frequency.

14. The method of claim 8 , wherein:
the buffer is a first-in first-out (FIFO) buffer storing four times the symbol rate; and
the selected plurality of bits from each buffer for each respective stream is at least five bits of a preamble derived from the input signal and one quarter of a number of bits buffered therein based on a mode of every four samples from the respective FIFO buffer for each respective stream.

15. A receiver comprising:
an input terminal configured to receive an input signal comprising a plurality of frequency-modulated data packets defining a plurality of symbols for a first channel;
an oscillator;
a first mixer connected to the input terminal and a first output of the oscillator;
a first analog-to-digital converter (ADC) connected to the mixer;
a second mixer connected to the input terminal and a second output of oscillator, wherein the second output is in quadrature with the first output of the oscillator;
a second ADC connected to the second mixer;
an in-phase/quadrature to phase converter connected to the first ADC and the second ADC;
a phase to frequency converter connected to the in-phase/quadrature to phase converter;
a plurality of candidate pipelines, each comprising a frequency adder coupled to the phase to frequency converter, a bit converter coupled to the frequency adder, a multi-bit buffer coupled to the bit converter and configured to select a plurality of bits corresponding to at least one bit per symbol to match a number of bits in a reference code; and a correlator coupled to the multi-bit buffer and configured to correlate the selected plurality of bits with the reference code, respectively; and
a candidate pipeline selector coupled to the correlators,
wherein the multi-bit buffer stores a plurality of preamble bits derived from the input signal,
wherein the selected plurality of bits is less than the stored plurality of bits, and the selected bits are non-consecutive.

16. The receiver of claim 15 , further comprising an amplifier connected between the input terminal and the mixers.

17. The receiver of claim 15 , further comprising:
a first filter connected between the first ADC and the in-phase/quadrature to phase converter; and
a second filter connected between the second ADC and the in-phase/quadrature to phase converter.

18. The receiver of claim 15 , further comprising a down-sampler connected between the phase to frequency converter and the plurality of candidate pipelines.

19. The receiver of claim 15 , wherein:
the plurality of candidate pipelines are arranged in parallel with each other.

20. The receiver of claim 15 , further comprising a multiplexer and/or demultiplexer (Mux/Demux) connected between the phase to frequency converter and an input terminal of the plurality of candidate pipelines, wherein the Mux/Demux is configured to switchably share at least some of the plurality of candidate pipelines with another channel, and/or to temporarily bypass at least some of the plurality of candidate pipelines for the first channel.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Nowshadi Farshid
• Sharpe Jacob C

Classifications

• H03M1/0836

  of phase error, e.g. jitter · CPC title

• H04L27/2663

  Coarse synchronisation, e.g. by correlation · CPC title

• H04L27/2657 Primary

  Carrier synchronisation · CPC title

• H04L27/0014 Primary

  Carrier regulation (of chaotic carriers H04L27/001; for multicarrier receivers H04L27/2657) · CPC title

• H04L27/3854 Primary

  using a non - coherent carrier, including systems with baseband correction for phase or frequency offset · CPC title