Noise filtering circuit and an electronic circuit including the same

Patent metadata

Field	Value
Publication number	US-11611315-B2
Application number	US-202117173943-A
Country	US
Kind code	B2
Filing date	Feb 11, 2021
Priority date	Apr 28, 2020
Publication date	Mar 21, 2023
Grant date	Mar 21, 2023

Abstract

A noise filtering circuit including: an amplifier which receives a reference bias through a first input terminal, generates an amplified output voltage and outputs the amplified output voltage through an output terminal, and receives an output voltage generated on the basis of the amplified output voltage through a second input terminal; a resistance component connected between the output terminal of the amplifier and the second input terminal; and a capacitor connected to the resistance component.

First claim

What is claimed is:

1. A noise filtering circuit, comprising:
an amplifier which receives a reference bias through a first input terminal, generates an amplified output voltage and outputs the amplified output voltage through an output terminal, and receives an output voltage generated on the basis of the amplified output voltage through a second input terminal;
a resistance component connected between the output terminal of the amplifier and the second input terminal; and
a capacitor connected to the resistance component,
wherein the resistance component includes a pseudo resistor,
wherein the pseudo resistor includes a first transistor and a second transistor,
a first terminal of the first transistor is connected to the output terminal, and a second terminal and a gate of the first transistor are connected to a common terminal, and
a first terminal of the second transistor is connected to the second input terminal and the capacitor, and a second terminal and a gate of the second transistor are connected to the common terminal.

2. The noise filtering circuit of claim 1 , wherein the first transistor and the second transistor each include a p-type metal oxide semiconductor (PMOS) transistor.

3. A noise filtering circuit, comprising:
an amplifier to which a reference bias is input through a first input terminal;
a first capacitor including a first terminal connected to a second input terminal of the amplifier, and a second terminal connected to an output terminal of the amplifier;
a first resistance component including a first terminal connected to the output terminal, and a second terminal connected to a filtering terminal;
a second resistance component including a first terminal connected to the second input terminal, and a second terminal connected to the filtering terminal; and
a second capacitor connected to the filtering terminal,
wherein an output voltage, in which noise of the reference bias is filtered, is output through the filtering terminal.

4. The noise filtering circuit of claim 3 , wherein the first resistance component includes a transistor, and
wherein the transistor is connected to the output terminal of the amplifier, the filtering terminal, and an off-voltage.

5. The noise filtering circuit of claim 4 , wherein the transistor includes an n-type metal oxide semiconductor (NMOS) transistor.

6. The noise filtering circuit of claim 4 , Wherein the transistor includes a p-type metal oxide semiconductor (PMOS) transistor.

7. The noise filtering circuit of claim 3 , wherein the second resistance component includes a transistor, and
wherein the transistor is connected to the second input terminal, the filtering terminal, and an off-voltage.

8. The noise filtering circuit of claim 7 , wherein the transistor includes an n-type metal oxide semiconductor (NMOS) transistor.

9. The noise filtering circuit of claim 7 , wherein the transistor includes a p-type metal oxide semiconductor (PMOS) transistor.

10. The noise filtering circuit of claim 3 , wherein the first resistance component includes a pseudo resistor.

11. The noise filtering circuit of claim 10 , wherein the pseudo resistor includes a first transistor and a second transistor,
the first transistor is connected to the output terminal, and a common terminal, and
the second transistor is connected to the filtering terminal, and the common terminal.

12. The noise filtering circuit of claim 3 , Wherein the second resistance component includes a pseudo resistor.

13. The noise filtering circuit of claim 12 , wherein the pseudo resistor includes a first transistor and a second transistor,
the first transistor is connected to the second input terminal, and a common terminal, and
the second transistor is connected to the filtering terminal, and the common terminal.

14. A noise filtering circuit, comprising:
an amplifier including a first input terminal, a second input terminal and an output terminal, wherein the amplifier is configured to receive a reference bias at the first input terminal, generate an amplified output voltage, output the amplified output voltage through the output terminal, and receive an output voltage generated using the amplified output voltage at the second input terminal;
a resistance component connected to the output terminal; and
a capacitor connected to the resistance component,
wherein the resistance component includes a first transistor and a second transistor,
first terminal of the first transistor is connected to the output terminal, and a second terminal and a gate of the first transistor are connected to a common terminal, and
a first terminal of the second transistor is connected to the second input terminal and the capacitor, and a second terminal and a gate of the second transistor are connected to the common terminal.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Lee Jong Mi
• Lim Yong
• Lo Chilun

Classifications

• H03F2200/294

  the amplifier being a low noise amplifier [LNA] · CPC title

• H03F1/26

  Modifications of amplifiers to reduce influence of noise generated by amplifying elements · CPC title

• G05F1/468

  characterised by reference voltage circuitry, e.g. soft start, remote shutdown · CPC title

• G11C13/004

  Reading or sensing circuits or methods · CPC title

• G11C7/02 Primary

  with means for avoiding parasitic signals · CPC title