Display device and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-11610919-B2
Application number	US-202117240847-A
Country	US
Kind code	B2
Filing date	Apr 26, 2021
Priority date	Aug 6, 2020
Publication date	Mar 21, 2023
Grant date	Mar 21, 2023

Abstract

A display device may include a substrate, a buffer layer on the substrate, a first active pattern on the buffer layer, the first active pattern having a first thickness, a second active pattern on the buffer layer spaced from the first active pattern and having a second thickness smaller than the first thickness, a first gate insulating layer on the first active pattern and the second active pattern, a first gate electrode on the first gate insulating layer, the first gate electrode overlapping the first active pattern, and a second gate electrode on the first gate insulating layer, the second gate electrode overlapping the second active pattern.

First claim

What is claimed is:

1. A display device comprising:
a substrate;
a buffer layer on the substrate;
a first active pattern on the buffer layer, the first active pattern having a first thickness;
a second active pattern on the buffer layer, spaced from the first active pattern, and having a second thickness smaller than the first thickness;
a first gate insulating layer on the first active pattern and the second active pattern;
a first gate electrode on the first gate insulating layer, the first gate electrode overlapping the first active pattern;
a second gate electrode on the first gate insulating layer, the second gate electrode overlapping the second active pattern;
a second gate insulating layer on the first gate electrode and the second gate electrode; and
a capacitor electrode on the second gate insulating layer, the capacitor electrode overlapping the first gate electrode.

2. The display device of claim 1 , wherein a value obtained by subtracting the second thickness from the first thickness is greater than 0 and less than about 60 Å.

3. The display device of claim 1 , wherein the first thickness is about 300 Å to about 500 Å.

4. The display device of claim 1 , wherein a distance from the substrate to a bottom surface of the first active pattern is substantially equal to a distance from the substrate to a bottom surface of the second active pattern.

5. The display device of claim 4 , wherein a top surface of the buffer layer is flat.

6. The display device of claim 1 , wherein a distance from the substrate to a top surface of the first active pattern is substantially equal to a distance from the substrate to a top surface of the second active pattern.

7. A display device comprising:
a substrate;
a buffer layer on the substrate;
a first active pattern on the buffer layer, the first active pattern having a first thickness;
a second active pattern on the buffer layer, spaced from the first active pattern, and having a second thickness smaller than the first thickness;
a first gate insulating layer on the first active pattern and the second active pattern;
a first gate electrode on the first gate insulating layer, the first gate electrode overlapping the first active pattern; and
a second gate electrode on the first gate insulating layer, the second gate electrode overlapping the second active pattern,
wherein a distance from the substrate to a top surface of the first active pattern is substantially equal to a distance from the substrate to a top surface of the second active pattern and
wherein the buffer layer has a trench that overlaps the first active pattern.

8. The display device of claim 1 , further comprising a conductive pattern between the substrate and the buffer layer, the conductive pattern overlapping the first active pattern.

9. The display device of claim 1 , wherein each of the first active pattern and the second active pattern comprises polycrystalline silicon.

Assignees

• Samsung Display Co Ltd

Inventors

• Choi Jonghoon
• Seo Jongoh
• Kim Ji-Hwan
• Baek Jongjun
• So Byung Soo

Classifications

• H10D30/0312

  characterised by the gate electrodes · CPC title

• H10D30/0321

  comprising silicon, e.g. amorphous silicon or polysilicon · CPC title

• H10D30/6743

  Silicon · CPC title

• H10D86/421

  having a particular composition, shape or crystalline structure of the active layer · CPC title

• H10D86/0221

  comprising manufacture, treatment or patterning of TFT semiconductor bodies · CPC title