Multilayer capacitor

US11610733B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11610733-B2
Application numberUS-202117224738-A
CountryUS
Kind codeB2
Filing dateApr 7, 2021
Priority dateOct 30, 2020
Publication dateMar 21, 2023
Grant dateMar 21, 2023

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A multilayer capacitor includes a body including a multilayer structure in which a plurality of dielectric layers are stacked and a plurality of internal electrodes stacked with the dielectric layer interposed therebetween and external electrodes disposed on an exterior of the body and connected to the internal electrodes. At least one of the plurality of dielectric layers includes a plurality of grains, and a ratio of grains having dislocations, among the plurality of grains, is 20% or greater.

First claim

Opening claim text (preview).

What is claimed is: 1. A multilayer capacitor comprising: a body including a multilayer structure in which a plurality of dielectric layers are stacked and a plurality of internal electrodes are stacked with the plurality of dielectric layers interposed therebetween; and external electrodes disposed on an exterior of the body and connected to the internal electrodes, wherein at least one of the plurality of dielectric layers comprises barium titanate and includes a plurality of grains, and a ratio of grains having dislocations, among the plurality of grains, is 20% or greater. 2. The multilayer capacitor of claim 1 , wherein the dislocations are spaced apart from grain boundaries between the plurality of grains. 3. The multilayer capacitor of claim 1 , wherein a dislocation in one of the plurality of grains is in contact with only one grain boundary among grain boundaries between the one of the plurality of grains and other grains of the plurality of grains. 4. The multilayer capacitor of claim 1 , wherein a dislocation within one of the plurality of grains is disposed between a phase having a tetragonal crystal structure and a phase having a cubic crystal structure. 5. The multilayer capacitor of claim 1 , wherein a portion of the plurality of grains has a plurality of dislocations. 6. The multilayer capacitor of claim 1 , wherein the ratio of grains having dislocations, among the plurality of grains, is a value obtained by averaging values measured in at least four unit areas among cut surfaces of the dielectric layer. 7. The multilayer capacitor of claim 1 , wherein the ratio of grains having dislocations, among the plurality of grains, is 40% or less. 8. The multilayer capacitor of claim 1 , wherein each of the dislocations is spaced apart from grain boundaries between the plurality of grains, or is in contact with only one grain boundary among the grain boundaries of the plurality of grains. 9. A multilayer capacitor comprising: a body including a multilayer structure in which a plurality of dielectric layers comprising barium titanate and having grains are stacked and a plurality of internal electrodes are stacked with the plurality of dielectric layers interposed therebetween; and external electrodes disposed on an exterior of the body and connected to the internal electrodes, wherein a ratio of grains having dislocations in a region of the body, among grains in the region of the body, is 20% or greater. 10. The multilayer capacitor of claim 9 , wherein in the region of the body, each of the dislocation is spaced apart from grain boundaries between the plurality of grains, or is in contact with only one grain boundary among grain boundaries of the grains. 11. The multilayer capacitor of claim 9 , wherein a dislocation within one of the plurality of grains is disposed between a phase having a tetragonal crystal structure and a phase having a cubic crystal structure. 12. The multilayer capacitor of claim 9 , wherein in the region of the body, a portion of the plurality of grains has a plurality of dislocations. 13. The multilayer capacitor of claim 9 , wherein the ratio of grains having dislocations in the region of the body among the grains in the region of the body is 40% or less. 14. A multilayer capacitor comprising: a body including a multilayer structure in which a plurality of dielectric layers comprising barium titanate and having grains are stacked and a plurality of internal electrodes are stacked with the plurality of dielectric layers interposed therebetween; and external electrodes disposed on an exterior of the body and connected to the internal electrodes, wherein an average of ratios of grains having dislocations among grains respectively obtained in a plurality of unit areas in a cut surface of the body, is 20% or greater. 15. The multilayer capacitor of claim 14 , wherein in each of the unit areas, each of the dislocations is spaced apart from grain boundaries between the plurality of grains, or is in contact with only one grain boundary among grain boundaries of the grains. 16. The multilayer capacitor of claim 14 , wherein a dislocation within one of the plurality of grains is disposed between a phase having a tetragonal crystal structure and a phase having a cubic crystal structure. 17. The multilayer capacitor of claim 14 , wherein in each of the unit areas, a portion of the plurality of grains have a plurality of dislocations. 18. The multilayer capacitor of claim 14 , wherein the average of the ratios is 40% or less.

Assignees

Inventors

Classifications

  • H01G4/12Primary

    Ceramic dielectrics {(H01G4/085 takes precedence)} · CPC title

  • electrically connecting two or more layers of a stacked or rolled capacitor · CPC title

  • Form of non-self-supporting electrodes · CPC title

  • H01G4/1227Primary

    based on alkaline earth titanates · CPC title

  • H01G4/30Primary

    Stacked capacitors (H01G4/33 takes precedence) · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US11610733B2 cover?
A multilayer capacitor includes a body including a multilayer structure in which a plurality of dielectric layers are stacked and a plurality of internal electrodes stacked with the dielectric layer interposed therebetween and external electrodes disposed on an exterior of the body and connected to the internal electrodes. At least one of the plurality of dielectric layers includes a plurality …
Who is the assignee on this patent?
Samsung Electro Mech
What technology area does this patent fall under?
Primary CPC classification H01G4/12. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 21 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).