Display panel and display device

Patent metadata

Field	Value
Publication number	US-11609466-B2
Application number	US-202117483595-A
Country	US
Kind code	B2
Filing date	Sep 23, 2021
Priority date	Jan 19, 2021
Publication date	Mar 21, 2023
Grant date	Mar 21, 2023

Abstract

Disclosed in the disclosure are a display panel and a display device. The display panel includes: a first base substrate; a plurality of scan signal lines arranged on a side of the first base substrate; a plurality of data signal lines arranged on sides, facing away from the first base substrate, of the scan signal lines; and first shielding parts arranged on sides, facing away from the scan signal lines, of the data signal lines, wherein each first shielding part is of a strip structure, and in each sub-pixel unit, both sides of the data signal line are each provided with one first shielding part.

First claim

What is claimed is:

1. A display panel, comprising:
a first base substrate;
a plurality of scan signal lines arranged on a side of the first base substrate, wherein the plurality of scan signal lines extend in a first direction, and are arranged in a second direction, and the first direction and the second direction intersect;
a plurality of data signal lines arranged on sides, facing away from the first base substrate, of the scan signal lines, wherein the plurality of data signal lines extend in the second direction, and are arranged in the first direction, and the plurality of scan signal lines and the plurality of data signal lines define a plurality of sub-pixel units; and
first shielding parts arranged on sides, facing away from the scan signal lines, of the data signal lines, wherein the first shielding parts each is of a strip structure and extends in the second direction, and
in each of the sub-pixel units, both sides, in the first direction, of the data signal line are each provided with a respective one of the first shielding parts;
the display panel further comprises:
a gate metal layer arranged on the first base substrate, wherein the gate metal layer comprises patterns of the plurality of scan signal lines and patterns of a plurality of common electrode signal lines;
a gate insulating layer arranged on a side, facing away from the first base substrate, of the gate metal layer;
a source-drain metal layer arranged on a side, facing away from the gate metal layer, of the gate insulating layer, wherein the source-drain metal layer comprises patterns of the plurality of data signal lines;
a passivation layer arranged on a side, facing away from the gate insulating layer, of the source-drain metal layer; and
an organic film layer arranged on a side, facing away from the source-drain metal layer, of the passivation layer;
wherein the first shielding parts are arranged on a surface of a side, facing away from the passivation layer, of the organic film layer;
wherein a first region of the organic film layer covers the data signal lines, a region, other than the first region, of the organic film layer is a second region, and a thickness of the first region is greater than a thickness of the second region; and
the organic film layer is arranged as an inclined surface at a boundary between the first region and the second region, and the first shielding parts are disposed on the inclined surface.

2. The display panel according to claim 1 , further comprising:
a plurality of pixel electrodes; and
a plurality of common electrodes; wherein
the pixel electrodes and the gate metal layer are disposed in a same layer, and a pattern of the pixel electrodes and a pattern of the gate metal layer do not overlap each other; or, the pixel electrodes and the source-drain metal layer are disposed in a same layer; and
the common electrodes are arranged on the surface of the side, facing away from the passivation layer, of the organic film layer.

3. The display panel according to claim 2 , wherein the common electrodes each is a comb electrode, and an extending direction of the comb electrode is the second direction;
the first shielding parts and the common electrodes are connected with each other; and
signals applied by the first shielding parts are same as signals applied by the common electrodes.

4. The display panel according to claim 2 , further comprising:
second shielding parts arranged on sides, facing away from the first shielding parts, of the data signal lines, wherein the second shielding parts each is of a strip structure and extends in the second direction, and
in each of the sub-pixel units, both sides, in the first direction, of the data signal line are each provided with a respective one of the second shielding parts.

5. The display panel according to claim 4 , wherein the second shielding parts and the gate metal layer are disposed in a same layer; the second shielding parts are connected with the common electrode signal lines; and
signals applied by the first shielding parts are same as signals applied by the common electrodes and signals applied by the second shielding parts are same as signals applied by the common electrodes.

6. The display panel according to claim 1 , wherein the thickness of the first region is set to range from 2 μm-3 μm, and the thickness of the second region is 8000 Å.

7. The display panel according to claim 1 , wherein an orthographic projection, on the first base substrate, of the first shielding parts does not overlap with an orthographic projection, on the first base substrate, of the data signal lines.

8. The display panel according to claim 4 , wherein an orthographic projection, on the first base substrate, of the second shielding parts does not overlap with an orthographic projection, on the first base substrate, of the data signal lines.

9. The display panel according to claim 1 , wherein a thickness of the passivation layer is 1000 Å.

10. The display panel according to claim 1 , wherein the pixel electrode is a block electrode.

11. The display panel according to claim 1 , further comprising:
a second base substrate disposed opposite to the first base substrate;
a color film layer arranged on a side, facing the first base substrate, of the second base substrate; and
a liquid crystal layer arranged between the first base substrate and the second base substrate.

12. The display panel according to claim 11 , wherein the liquid crystal layer adopts positive liquid crystals or negative liquid crystals.

13. A display device, comprising the display panel according to claim 1 .

Assignees

• Wuhan Boe Optoelectronics Technology Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Zhu Ning
• Jiang Peng
• Liao Yanping
• Gao Yujie
• Liu Jun

Classifications

• G02F1/136286 Primary

  Wiring, e.g. gate line, drain line · CPC title

• G02F1/1362 Primary

  Active matrix addressed cells {(G02F1/134336, G02F1/134363 take precedence)} · CPC title

• G02F1/134372

  for fringe field switching [FFS] where the common electrode is not patterned · CPC title

• G02F1/136209

  Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element · CPC title

• G02F1/13606

  having means for reducing parasitic capacitance · CPC title