Flexible substrate and semiconductor apparatus

US11605585B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11605585-B2
Application numberUS-202117450579-A
CountryUS
Kind codeB2
Filing dateOct 12, 2021
Priority dateOct 28, 2020
Publication dateMar 14, 2023
Grant dateMar 14, 2023

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A flexible substrate includes a first area including a first circuit, the first circuit configured to be connectable to a first component, a second area including a second circuit, the second circuit configured to be connectable to a second component, a connecting area provided between the first area and the second area and including a third circuit, the third circuit connecting the first circuit and the second circuit, one or more first via conductors provided between the first area and the connecting area and electrically isolated from the first circuit, the second circuit, and the third circuit, and one or more second via conductors provided between the second area and the connecting area and electrically isolated from the first circuit, the second circuit, and the third circuit.

First claim

Opening claim text (preview).

What is claimed is: 1. A flexible substrate comprising: a first area including a first circuit, the first circuit configured to be connectable to a first component; a second area including a second circuit, the second circuit configured to be connectable to a second component; a connecting area provided between the first area and the second area and including a third circuit, the third circuit connecting the first circuit and the second circuit; one or more first via conductors provided between the first area and the connecting area and electrically isolated from the first circuit, the second circuit, and the third circuit; and one or more second via conductors provided between the second area and the connecting area and electrically isolated from the first circuit, the second circuit, and the third circuit, wherein the one or more first via conductors are electrically isolated from the one or more second via conductors; wherein the one or more first via conductors are electrically isolated from any circuits situated in the first area, the second area, or the connecting area, and the one or more second via conductors are electrically isolated from any circuits situated in the first area, the second area, or the connecting area. 2. The flexible substrate as claimed in claim 1 , wherein the connecting area is configured to be bendable for time of use of the flexible substrate. 3. The flexible substrate as claimed in claim 1 , further comprising a plurality of insulating layers containing therein the first circuit, the second circuit, the third circuit, the one or more first via conductors, and the one or more second via conductors, wherein the one or more first via conductors and the one or more second via conductors are provided in at least one of two outermost insulating layers among the plurality of insulating layers. 4. The flexible substrate as claimed in claim 3 , wherein the one or more first via conductors and the one or more second via conductors are provided in an outermost insulating layer, among the plurality of insulating layers, that comes on an outside when bending the connecting area. 5. The flexible substrate as claimed in claim 3 , wherein the one or more first via conductors are provided in all of the plurality of insulating layers, and are connected to each other in a thickness direction of the insulating layers. 6. The flexible substrate as claimed in claim 5 , wherein the one or more second via conductors are provided in all of the plurality of insulating layers, and are connected to each other in a thickness direction of the insulating layers. 7. The flexible substrate as claimed in claim 1 , further comprising a solder resist layer covering the first area and the second area, wherein the connecting area is not covered with the solder resist layer. 8. The flexible substrate as claimed in claim 1 , wherein a via conductor connected to the third circuit is not provided in the connecting area. 9. A semiconductor apparatus, comprising: the flexible substrate of claim 1 ; a first component mounted on the first area and connected to the first circuit; and a second component mounted on the second area and connected to the second circuit.

Assignees

Inventors

Classifications

  • comprising multiple insulating layers · CPC title

  • on active surfaces of flip-chip devices, e.g. underfills · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • for connecting multiple chips together · CPC title

Patent family

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Frequently asked questions

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What does patent US11605585B2 cover?
A flexible substrate includes a first area including a first circuit, the first circuit configured to be connectable to a first component, a second area including a second circuit, the second circuit configured to be connectable to a second component, a connecting area provided between the first area and the second area and including a third circuit, the third circuit connecting the first circu…
Who is the assignee on this patent?
Shinko Electric Ind Co
What technology area does this patent fall under?
Primary CPC classification H10W70/688. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 14 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).