Mobile speech recognition hardware accelerator
US-2015199963-A1 · Jul 16, 2015 · US
US11599787B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11599787-B2 |
| Application number | US-201716330906-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 4, 2017 |
| Priority date | Sep 7, 2016 |
| Publication date | Mar 7, 2023 |
| Grant date | Mar 7, 2023 |
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A hardware-implemented multi-layer perceptron model calculation unit includes: a processor core to calculate output quantities of a neuron layer based on input quantities of an input vector; a memory that has, for each neuron layer, a respective configuration segment for storing configuration parameters and a respective data storage segment for storing the input quantities of the input vector and the one or more output quantities; and a DMA unit to successively instruct the processor core to: calculate respective neuron layers based on the configuration parameters of each configuration segment, calculate input quantities of the input vector defined thereby, and store respectively resulting output quantities in a data storage segment defined by the corresponding configuration parameters, the configuration parameters of configuration segments successively taken into account indicating a data storage region for the resulting output quantities corresponding to the data storage region for the input quantities for a subsequent neuron layer.
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What is claimed is: 1. A hardwired hardware-implemented model calculation unit for calculating a multi-layer perceptron model that defines how neurons of each of a plurality of neuron layers of a neural network operate using code that defines a set of configuration parameters to be operated upon for calculation of each of the plurality of neuron layers of the neural network, respective values of the configuration parameters being variable for the calculation of different ones of the plurality of neuron layers, the model calculation unit comprising: a processor core; a memory; and a Direct Memory Access (DMA) unit; wherein: the processor core is configured to calculate one or more respective output quantities of the neuron layers of the multi-layer perceptron model having a number of neurons as a function of one or more input quantities of respective input quantity vectors; the memory includes, for each neuron layer: a respective configuration memory region that, prior to the calculating of the multi-layer perception model, stores representations of the respective values of respective instances of the set of configuration parameters in a respective one of a plurality of configuration memory segments, which is uniquely assigned to the respective neuron layer, the respective configuration memory segment including a respective register for each of the configuration parameters of the set, a respective register with a first pointer to the input quantities of the respective input quantity vector of the respective neuron layer, and a respective register with a second pointer to the output quantities of the respective neuron layer; and a data storage region for storing in a first respective data storage segment, the input quantities of the respective input quantity vector of the respective neuron layer to which the respective first pointer of the respective neuron layer points, and for storing in a second respective data storage segment the one or more output quantities to which the respective second pointer of the respective neuron layer points; and the DMA unit is configured to successively instruct the processor core to calculate a respective neuron layer of the multi-layer perceptron model by executing code using the respective instance of the set of configuration parameters of the respective one of the configuration memory segments assigned to the respective neuron layer, and to calculate the input quantities defined thereby of the input quantity vector, and to store respectively resulting output quantities in a respective one of the data storage segments. 2. The model calculation unit of claim 1 , wherein the second data storage region of a first one of the neuron layers is pointed to as the first data storage region of a second one of the neuron layers that immediately follows the first neuron layer. 3. The model calculation unit of claim 1 , wherein the DMA unit is configured to provide to the processor core, after termination of the calculation of one of the neuron layers, the configuration parameters for a next one of the neuron layers, the calculation being terminated as a function of one or more of the configuration parameters. 4. The model calculation unit of claim 1 , wherein the processor core is configured to signal an end of a current calculation of one of the neuron layers to the DMA unit or to an external location, the DMA unit subsequently starting the calculation of a next one of the neuron layers based on configuration parameters stored in a further one of the configuration memory segments. 5. The model calculation unit of claim 1 , wherein the processor core is configured to calculate, for a respective one of the neuron layers of the multi-layer perceptron model, an output quantity for each neuron of the respective neuron layer as a function of one or more input quantities of an input quantity vector, a weighting matrix having weighting factors, and an offset value specified for each of the neurons of the respective layer, such that, for each of the neurons of the respective layer, the offset value assigned to the respective neuron is applied to a sum of the values of the input quantities, weighted with a weighting factor determined by the respective neuron and the input quantity to provide a result that is transformed with an activation function in order to obtain the output quantity for the respectice neuron. 6. The model calculation unit of claim 1 , wherein the processor core is arranged in a surface region of an integrated module. 7. A control device comprising: a microprocessor; and one or more hardwired hardware-implemented model calculation units (a) for calculating a multi-layer perceptron model that defines how neurons of each of a plurality of neuron layers of a neural network operate using code that defines a set of configuration parameters to be operated upon for calculation of each of the plurality of neuron layers of the neural network, respective values of the configuration parameters being variable for the calculation of different ones of the plurality of neuron layers and (b) that each includes a processor core, a memory, and a Direct Memory Access (DMA) unit; wherein: the processor core is configured to calculate one or more respective output quantities of the neuron layers of the multi-layer perceptron model having a number of neurons as a function of one or more input quantities of respective input quantity vectors; the memory includes, for each neuron layer: a respective configuration memory region that, prior to the calculating of the multi-layer perception model, stores representations of the respective values of respective instances of the set of configuration parameters in a respective one of a plurality of configuration memory segments, which is uniquely assigned to the respective neuron layer, the respective configuration memory segment including a respective register for each of the configuration parameters of the set, a respective register with a first pointer to the input quantities of the respective input quantity vector of the respective neuron layer, and a respective register with a second pointer to the output quantities of the respective neuron layer; and a data storage region for storing in a first respective data storage segment, the input quantities of the respective input quantity vector of the respective neuron layer to which the respective first pointer of the respective neuron layer points, and for storing in a second respective data storage segment the one or more output quantities to which the respective second pointer of the respective neuron layer points; and the DMA unit is configured to successively instruct the processor core to calculate a respective neuron layer of the multi-layer perceptron model by executing code using the respective instance of the set of configuration parameters of the respective one of the configuration memory segments assigned to the respective neuron layer, and to calculate the input quantities defined thereby of the input quantity vector, and to store respectively resulting output quantities in a respective one of the data storage segments. 8. The control device of claim 7 , wherein the control device is implemented as an integrated circuit. 9. A method of a control device that controls an engine system of a motor vehicle, wherein the control device includes (a) a microprocessor and (b) one or more hardwired hardware-implemented model calculation units (i) for calculating a multi-layer perceptron model that defines how neurons of each of a plurality of neuron layers of a neural network operate using code that defines a set of configuration parameters to be operated upon for calculation of each of the plurality of neuron layers of the neural ne
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