Chip-integrated device and methods for generating random numbers that is reconfigurable and provides genuineness verification
US-11442697-B2 · Sep 13, 2022 · US
US11595198B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11595198-B2 |
| Application number | US-202217691337-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 10, 2022 |
| Priority date | Mar 15, 2021 |
| Publication date | Feb 28, 2023 |
| Grant date | Feb 28, 2023 |
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Official abstract text for this publication.
In aspects of quantum-based security for hardware devices, a computing device includes a processor for application processing in a trusted execution environment, and includes a quantum random number generator to generate quantum random numbers sourced by multiple hardware devices in the computing device. The computing device also includes an embedded secure element that manages connection security of the multiple hardware devices, and is a single root of trust as a secure controller of the quantum random number generator. The computing device also includes a secure switch controlled by the embedded secure element, the secure switch being switchable to connect at least one of the multiple hardware devices to obtain a quantum random number from the quantum random number generator. The secure switch may be a virtualized secure switch implemented in the embedded secure element.
Opening claim text (preview).
The invention claimed is: 1. A computing device, comprising: a processor configured for application processing in a trusted execution environment; a quantum random number generator configured to generate quantum random numbers sourced by multiple hardware devices in the computing device; and an embedded secure element configured to manage connection security of the multiple hardware devices as a secure controller of the quantum random number generator, and monitor entropy source performance associated with generating the quantum random numbers. 2. The computing device of claim 1 , wherein the embedded secure element is a single root of trust as the secure controller of the quantum random number generator. 3. The computing device of claim 1 , wherein the embedded secure element is configured to determine an operation health status of the quantum random number generator based on the monitored entropy source performance. 4. The computing device of claim 1 , wherein the multiple hardware devices are tamper-resistant components that include at least the processor and the embedded secure element. 5. The computing device of claim 1 , wherein the multiple hardware devices are tamper-resistant components that include at least the processor and an integrated circuit that incorporates the embedded secure element. 6. The computing device of claim 1 , further comprising a secure switch controlled by the embedded secure element, the secure switch being switchable to connect at least one of the multiple hardware devices to obtain a quantum random number from the quantum random number generator. 7. The computing device of claim 6 , wherein the at least one hardware device receives the quantum random number generated by the quantum random number generator via a secure data bus that connects the at least one hardware device to the secure switch. 8. The computing device of claim 1 , further comprising a virtualized secure switch implemented in the embedded secure element, the virtualized secure switch being switchable to connect at least one of the multiple hardware devices to obtain a quantum random number from the quantum random number generator. 9. The computing device of claim 8 , wherein the at least one hardware device receives the quantum random number that is passed through the embedded secure element and via a secure data bus that connects the at least one hardware device to the embedded secure element. 10. A computing device, comprising: a processor configured for application processing in a trusted execution environment; a quantum random number generator configured to generate quantum random numbers sourced by multiple hardware devices in the computing device; and a secure switch controlled by an embedded secure element that manages connection security of the multiple hardware devices and monitors entropy source performance associated with generating the quantum random numbers, the secure switch being switchable to connect at least one of the multiple hardware devices to obtain a quantum random number from the quantum random number generator. 11. The computing device of claim 10 , wherein the embedded secure element is a single root of trust as a secure controller of the secure switch to manage access to the quantum random number generator by the multiple hardware devices. 12. The computing device of claim 10 , wherein the embedded secure element is configured to determine an operation health status of the quantum random number generator based on the monitored entropy source performance. 13. The computing device of claim 10 , wherein the multiple hardware devices are tamper-resistant components that include at least the processor and the embedded secure element. 14. The computing device of claim 10 , wherein the multiple hardware devices are tamper-resistant components that include at least the processor and an integrated circuit that incorporates the embedded secure element. 15. The computing device of claim 10 , wherein the at least one hardware device receives the quantum random number generated by the quantum random number generator via a secure data bus that connects the at least one hardware device to the secure switch. 16. The computing device of claim 10 , wherein: the secure switch is a virtualized secure switch implemented in the embedded secure element; and the at least one hardware device receives the quantum random number that is passed through the embedded secure element and via a secure data bus that connects the at least one hardware device to the embedded secure element. 17. A method, comprising: generating quantum random numbers by a quantum random number generator that is sourced by multiple hardware devices in a computing device; managing connection security of the multiple hardware devices by an embedded secure element that is operational as a secure controller of the quantum random number generator; switching a secure switch by the embedded secure element to connect at least one of the multiple hardware devices that requests a quantum random number from the quantum random number generator; and monitoring entropy source performance associated with generating the quantum random numbers. 18. The method of claim 17 , wherein the embedded secure element is a single root of trust as the secure controller of the secure switch to manage access to the quantum random number generator by the multiple hardware devices. 19. The method of claim 17 , further comprising: determining an operation health status of the quantum random number generator by the embedded secure element based on the monitored entropy source performance. 20. The method of claim 17 , wherein the secure switch is a virtualized secure switch implemented in the embedded secure element.
Quantum computing, i.e. information processing based on quantum-mechanical phenomena · CPC title
involving random numbers or seeds · CPC title
involving user or device identifiers, e.g. serial number, physical or biometrical information, DNA, hand-signature or measurable physical characteristics · CPC title
by means of encapsulation, e.g. for integrated circuits · CPC title
Quantum cryptography (transmission systems employing electromagnetic waves other than radio waves, e.g. light, infrared H04B10/00; wavelength-division multiplex systems H04J14/02; WDM arrangements H04J14/03) · CPC title
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