Display module including light-shielding layer, and display apparatus

Patent metadata

Field	Value
Publication number	US-11594063-B2
Application number	US-201916730820-A
Country	US
Kind code	B2
Filing date	Dec 30, 2019
Priority date	Oct 31, 2019
Publication date	Feb 28, 2023
Grant date	Feb 28, 2023

Abstract

Provided are a display module and a display apparatus. The display module includes: sub-pixels arranged in an array along a first direction and a second direction; and an array substrate including an underlay substrate, a fingerprint recognition unit, and a first light-shielding layer. The fingerprint recognition unit includes a photosensitive semiconductor layer, and an orthographic projection of the photosensitive semiconductor layer on a plane of the underlay substrate is located between two adjacent sub-pixels along the second direction. The first light-shielding layer is located on a side of the photosensitive semiconductor layer close to the underlay substrate, and an orthographic projection of the first light-shielding layer on a plane of the photosensitive semiconductor layer completely covers the photosensitive semiconductor layer, and along the first direction, a length of the first light-shielding layer is larger than or equal to twice a length of each of the plurality of sub-pixels.

First claim

What is claimed is:

1. A display module, comprising:
a plurality of sub-pixels arranged in an array along a first direction and a second direction, wherein the first direction intersects the second direction; and
an array substrate comprising an underlay substrate, a fingerprint recognition unit, a first light-shielding layer, and a plurality of thin film transistors,
wherein the fingerprint recognition unit comprises a photosensitive semiconductor layer, and an orthographic projection of the photosensitive semiconductor layer on a plane of the underlay substrate is located between two sub-pixels of the plurality of sub-pixels that are adjacent along the second direction,
wherein the first light-shielding layer is located on a side of the photosensitive semiconductor layer close to the underlay substrate, and an orthographic projection of the first light-shielding layer on a plane of the photosensitive semiconductor layer completely covers the photosensitive semiconductor layer, and a length of the first light-shielding layer along the first direction is larger than or equal to twice a length of each of the plurality of sub-pixels along the first direction,
wherein the array substrate further comprises a light-shielding structure located on a side of the first light-shielding layer facing away from the underlay substrate, and an orthographic projection of the light-shielding structure on the plane of the underlay substrate at least partially overlaps an orthographic projection of the first light-shielding layer on the plane of the underlay substrate,
wherein the light-shielding structure is far away from each of ends of the first light-shielding layer arranged in the first direction and is far away from each of ends of the first light-shielding layer arranged in the second direction;
wherein, in a direction perpendicular to the plane of the underlay substrate, the light-shielding structure does not overlap with the photosensitive semiconductor layer;
wherein the array substrate further comprises a gate metal layer, a source/drain metal layer, a gate insulation layer, and an interlayer insulation layer; the gate metal layer is located on a side of the gate insulation layer facing away from the underlay substrate, the interlayer insulation layer is located on a side of the gate metal layer facing away from the underlay substrate, and the source/drain metal layer is located on a side of the interlayer insulation layer facing away from the underlay substrate;
wherein the array substrate further comprises a plurality of scan lines, and a plurality of data lines, wherein the plurality of thin film transistors is connected to the plurality of scan lines and the plurality of data lines; the plurality of scan lines extends along the first direction and is arranged along the second direction, and the plurality of data lines extends along the second direction and is arranged along the first direction; the plurality of scan lines and the plurality of data lines intersect to define a plurality of sub-pixel regions, and the plurality of sub-pixels is located in the plurality of sub-pixel regions;
wherein each of the plurality of thin film transistors comprises a gate, a source, a drain, and an active layer;
wherein the gate and the plurality of scan lines are located in the gate metal layer;
wherein the source, the drain, and the plurality of data lines are located in the source/drain metal layer; and
wherein the gate insulation layer and the interlayer insulation layer include a first via hole, and the photosensitive semiconductor layer is located within the first via hole.

2. The display module according to claim 1 , wherein a shortest distance between an edge of the orthographic projection of the first light-shielding layer on the plane of the photosensitive semiconductor layer and an edge of the photosensitive semiconductor layer is greater than 6.5 μm.

3. The display module according to claim 1 , wherein an orthographic projection of the light-shielding structure on the plane of the photosensitive semiconductor layer surrounds the photosensitive semiconductor layer.

4. The display module according to claim 1 , wherein the array substrate further comprises a buffer layer; the buffer layer is located on the side of the first light-shielding layer facing away from the underlay substrate, the gate insulation layer is located on a side of the buffer layer facing away from the underlay substrate; and
wherein the active layer is located between the buffer layer and the gate insulation layer.

5. The display module according to claim 4 , wherein the array substrate further comprises a second light-shielding layer that is located on a side of the source/drain metal layer facing away from the underlay substrate; and a planarization layer is provided between the source/drain metal layer and the second light-shielding layer; and
wherein the second light-shielding layer comprises a hollow portion, and the hollow portion at least partially overlaps the photosensitive semiconductor layer in the direction perpendicular to the plane of the underlay substrate.

6. The display module according to claim 5 , wherein a material of the second light-shielding layer comprises a light absorbing resin.

7. The display module according to claim 5 , wherein the light-shielding structure comprises a first light-shielding structure and a second light-shielding structure, wherein an orthographic projection of the first light-shielding structure and the orthographic projection of the photosensitive semiconductor layer on the plane of the underlay substrate are arranged along the first direction, and wherein an orthographic projection of the second light-shielding structure and the orthographic projection of the photosensitive semiconductor layer on the plane of the underlay substrate are arranged along the second direction;
wherein the first light-shielding structure comprises a first sub-light-shielding structure penetrating the interlayer insulation layer and the gate insulation layer, and the second light-shielding structure comprises a second sub-light-shielding structure penetrating the interlayer insulation layer and the gate insulation layer.

8. The display module according to claim 7 , wherein:
the first light-shielding structure further comprises a fifth sub-light-shielding structure penetrating the planarization layer and being in contact with the first sub-light-shielding structure;
the fifth sub-light-shielding structure and the second light-shielding layer are formed in a same manufacturing process; and
the first sub-light-shielding structure and the source/drain metal layer are formed in a same manufacturing process.

9. The display module according to claim 5 , wherein the light-shielding structure comprises a first light-shielding structure and a second light-shielding structure, an orthographic projection of the first light-shielding structure and the orthographic projection of the photosensitive semiconductor layer on the plane of the underlay substrate are arranged along the first direction, and an orthographic projection of the second light-shielding structure and the orthographic projection of the photosensitive semiconductor layer on the plane of the underlay substrate are arranged along the second direction; and
wherein the first light-shielding structure comprises a third sub-light-shielding structure penetrating the gate insulation layer and the buffer layer, and the second light-shielding structure comprises a fourth sub-light-shielding structure penetrating the gate insulation layer and the buffer layer.

10. The display module according to claim 5 , wherein the light-shielding structure and the second light-shielding layer

Assignees

• Xiamen Tianma Micro Electronics Co Ltd

Inventors

• Liu Bingping
• Wu Xiaoxiao
• Chen Guozhao

Classifications

• G06V40/1318 Primary

  using electro-optical elements or layers, e.g. electroluminescent sensing · CPC title

• G02F1/136209 Primary

  Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element · CPC title

• G06V10/147

  Details of sensors, e.g. sensor lenses (fingerprint or palmprint sensors G06V40/13; vascular sensors G06V40/145; eye sensors G06V40/19) · CPC title

• G02F1/13338

  Input devices, e.g. touch panels · CPC title