Highly configurable power-delivery management policy

Patent metadata

Field	Value
Publication number	US-11592888-B2
Application number	US-202117306778-A
Country	US
Kind code	B2
Filing date	May 3, 2021
Priority date	Mar 30, 2019
Publication date	Feb 28, 2023
Grant date	Feb 28, 2023

Abstract

Described are mechanisms and methods for implementing highly configurable power delivery management policies. An apparatus may comprise a first circuitry, a second circuitry, a third circuitry, and a fourth circuitry. The first circuitry may include a memory to store a first table having one or more first entries and to store a second table having one or more respectively corresponding second entries. The second circuitry may, upon the occurrence of an event, test a condition specified by an entry in the first table. The third circuitry may, upon the test of the condition having a positive result, evaluate a set of one or more parameters as specified by an entry in a second table corresponding with the entry in the first table. The fourth circuitry may initiate a power-management action based upon the evaluation of the set of one or more parameters.

First claim

We claim:

1. One or more non-transitory machine-readable storage media having one or more instructions that when executed cause one or more machines to perform a method comprising: testing a condition specified by an entry in a first table, wherein the testing occurs based on an event corresponding to the entry in the first table;
evaluating a plurality of sets of one or more parameters as specified in an entry in a second table corresponding with the entry in the first table, wherein the evaluating occurs based on the testing of the condition resulting in a positive result; and
initiating a power-management action based on the evaluating of the plurality of sets of one or more parameters.

2. The one or more non-transitory machine-readable storage media of claim 1 , wherein evaluating the plurality of sets of one or more parameters comprises:
determining a value of a plurality of functions corresponding to the plurality of sets of one or more parameters.

3. The one or more non-transitory machine-readable storage media of claim 1 , wherein the power-management action corresponds with a power-management policy.

4. The one or more non-transitory machine-readable storage media of claim 3 , wherein the power-management policy includes: a power control policy, a thermal control policy, a fan control policy, and an adaptive performance policy.

5. The one or more non-transitory machine-readable storage media of claim 1 , wherein the condition is a first condition, and the plurality of sets of one or more parameters includes a first set of one or more parameters; wherein, upon an occurrence of the event, both the first condition and a second condition specified by the entry in the first table are tested.

6. The one or more non-transitory machine-readable storage media of claim 5 , having one or more instructions that when executed cause the one or more machines to perform a further method comprising:
evaluating the first set of one or more parameters and a second set of one or more parameters specified by the entry in the second table corresponding with the entry in the first table, upon testing of both the first condition and the second condition having positive results.

7. The one or more non-transitory machine-readable storage media of claim 1 , wherein the first table comprises one or more first entries for specifying conditions, and wherein the first table is stored in a memory.

8. The one or more non-transitory machine-readable storage media of claim 7 , wherein the second table comprises one or more second entries corresponding to the one or more first entries, wherein the second entries are for specifying relationships between the plurality of sets of one or more parameters.

9. The one or more non-transitory machine-readable storage media of claim 8 , wherein the memory is to store a third table having one or more third entries for specifying a plurality of functions corresponding with the plurality of sets of one or more parameters.

10. The one or more non-transitory machine-readable storage media of claim 9 , wherein a function on the plurality of functions is provided by an entry in the third table corresponding to an entry in the second table.

11. An apparatus comprising: a first circuitry to test a condition specified by an entry in a first table, wherein the test occurs based on an event corresponding to the entry in the first table;
a second circuitry to evaluate, based on the test of the condition being a positive result, a plurality of sets of one or more parameters as specified in an entry in a second table corresponding with the entry in the first table; and
a third circuitry to initiate a power-management action based on the evaluating of the plurality of sets of one or more parameters.

12. An apparatus comprising:
a memory to store a first table and a second table; and
a processor circuitry coupled to the memory, wherein the processor circuitry is to execute instructions to cause an operation comprising:
test a condition specified by an entry in the first table, wherein the test occurs based on an event corresponding to the entry in the first table;
evaluate, based on the test of the condition being a positive result, a plurality of sets of one or more parameters as specified in an entry in the second table corresponding with the entry in the first table; and
initiate a power-management action based on the evaluating of the plurality of sets of one or more parameters.

13. The apparatus of claim 12 , wherein the processor circuitry is to determine a value of a plurality of functions corresponding to the plurality of sets of one or more parameters to evaluate the plurality of sets of one or more parameters.

14. The apparatus of claim 12 , wherein the power-management action corresponds with a power-management policy.

15. The apparatus of claim 14 , wherein the power-management policy includes: a power control policy, a thermal control policy, a fan control policy, and an adaptive performance policy.

16. The apparatus of claim 12 , wherein the condition is a first condition, and the plurality of sets of one or more parameters includes a first set of one or more parameters; wherein, upon an occurrence of the event, both the first condition and a second condition specified by the entry in the first table are tested.

17. The apparatus of claim 16 , wherein the processor circuitry is to:
evaluate a first set of one or more parameters and a second set of one or more parameters specified by the entry in the second table corresponding with the entry in the first table, upon test of both a first condition and a second condition being positive results.

18. The apparatus of claim 12 , wherein the first table comprises one or more first entries for specifying conditions, and wherein the first table is stored in the memory, wherein the second table comprises one or more second entries corresponding to the one or more first entries, wherein the second entries are for specifying relationships between the plurality of sets of one or more parameters.

19. The apparatus of claim 18 , wherein the memory is to store a third table having one or more third entries for specifying a plurality of functions corresponding with the plurality of sets of one or more parameters, wherein a function on the plurality of functions is provided by an entry in the third table corresponding to the entry in the second table.

20. The apparatus of claim 11 , wherein the second circuitry is to determine a value of a plurality of functions corresponding to the
plurality of sets of one or more parameters, to evaluate the plurality of sets of one or more parameters.

21. The apparatus of claim 20 , wherein the power-management action corresponds with a power-management policy.

22. The apparatus of claim 21 , wherein the power-management policy includes: a power control policy, a thermal control policy, a fan control policy, and an adaptive performance policy.

Assignees

• Intel Corp

Inventors

• Nge Chee Lim
• Hermerding Ii James
• Wang Zhongsheng
• Alekal Pranava

Classifications

• G06F1/26

  Power supply means, e.g. regulation thereof (for memories G11C) · CPC title

• G06F1/3203 Primary

  Power management, i.e. event-based initiation of a power-saving mode · CPC title

• Y02D10/00

  Energy efficient computing, e.g. low power processors, power management or thermal management · CPC title

• G06F1/3234

  Power saving characterised by the action undertaken · CPC title

• H04W92/18

  between terminal devices · CPC title