Method and system for process and temperature compensation in a transimpedance amplifier using a dual replica

US11588445B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11588445-B2
Application numberUS-202017071950-A
CountryUS
Kind codeB2
Filing dateOct 15, 2020
Priority dateJan 16, 2015
Publication dateFeb 21, 2023
Grant dateFeb 21, 2023

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

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The present disclosure provides for process and temperature compensation in a transimpedance amplifier (TIA) using a dual replica via monitoring an output of a first TIA (transimpedance amplifier) and a second TIA; configuring a first gain level of the first TIA based on a feedback resistance and a reference current applied at an input to the first TIA; configuring a second gain level of the second TIA and a third TIA based on a control voltage; and amplifying a received electrical current to generate an output voltage using the third TIA according to the second gain level. In some embodiments, one or both of the second TIA and the third TIA include a configurable feedback impedance used in compensating for changes in the second gain level due to a temperature of the respective second or third TIA via the configurable feedback impedance of the respective second or third TIA.

First claim

Opening claim text (preview).

What is claimed is: 1. A method comprising: monitoring an output of a first TIA (transimpedance amplifier) and a second TIA; configuring a first gain level of the first TIA based on a fixed feedback resistance of the first TIA and a reference current applied at an input to the first TIA; configuring a second gain level of the second TIA and a third TIA based on a control voltage; and amplifying a received electrical current to generate an output voltage using the third TIA according to the second gain level. 2. The method of claim 1 , wherein the second TIA includes a configurable feedback impedance. 3. The method of claim 2 , wherein a first output of the first TIA and a second output of the second TIA are coupled to the configurable feedback impedance. 4. The method of claim 2 , further comprising: compensating for changes in the second gain level due to a temperature of the second TIA via the configurable feedback impedance of the second TIA. 5. The method of claim 2 , wherein the configurable feedback impedance includes a fixed resistor and a voltage-controlled resistance. 6. The method of claim 2 , wherein the third TIA includes an additional configurable feedback impedance. 7. A transimpedance amplifier (TIA) circuit comprising: a first TIA, a second TIA, and a third TIA, the first TIA comprising a fixed feedback resistance and the second TIA and the third TIA each comprising a configurable feedback impedance; and a control loop configured to: monitor an output of the first TIA and the second TIA; configure a first gain level of the first TIA based on the feedback resistance and a reference current applied at an input to the first TIA; configure a second gain level of the second TIA and the third TIA based on a control voltage generated by the control loop; and amplify a received electrical current to generate an output voltage using the third TIA. 8. The TIA circuit of claim 7 , further comprising a gain stage including: a first gain input coupled to a first output of the first TIA; a second gain input coupled to a second output of the second TIA; and a gain output coupled to the configurable feedback impedance of the second TIA and the third TIA. 9. The TIA circuit of claim 8 , wherein the reference current generates a reference voltage at one of the first gain input and the second gain input. 10. The TIA circuit of claim 9 , wherein the reference voltage controls the gain output. 11. The TIA circuit of claim 7 , wherein the control loop is further configured to compensate for changes in the second gain level based on temperature changes in at least one of the second TIA and the third TIA via the configurable feedback impedance. 12. The TIA circuit of claim 7 , wherein the configurable feedback impedance comprises: a fixed resistor and a voltage-controlled resistance. 13. The TIA circuit of claim 12 , wherein the configurable feedback impedance is configurable via a gate voltage of a transistor of the voltage-controlled resistance. 14. A control loop configured to: monitor an output of a first transimpedance amplifier (TIA) and a second TIA; configure a first gain level of the first TIA based on a feedback resistance and a reference current applied at an input to the first TIA; configure a second gain level of the second TIA and a third TIA based on a control voltage generated by the control loop, wherein a configurable feedback impedance of the second TIA includes a fixed resistor and a voltage-controlled resistance; and amplify a received electrical current to generate an output voltage using the third TIA. 15. The control loop of claim 14 , wherein a first output of the first TIA and a second output of the second TIA are coupled to the configurable feedback impedance. 16. The control loop of claim 14 , further configured to: compensate for changes in the second gain level due to a temperature of the second TIA via the configurable feedback impedance of the second TIA. 17. The control loop of claim 14 , wherein the third TIA includes an additional configurable feedback impedance.

Assignees

Inventors

Classifications

  • Circuit arrangements · CPC title

  • the devices being sensitive to infrared radiation, visible or ultraviolet radiation, and having no potential barriers, e.g. photoresistors · CPC title

  • there being a feedback over the complete amplifier · CPC title

  • with FET's (H03F3/085 takes precedence) · CPC title

  • with IC amplifier blocks (H03F3/085 takes precedence) · CPC title

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What does patent US11588445B2 cover?
The present disclosure provides for process and temperature compensation in a transimpedance amplifier (TIA) using a dual replica via monitoring an output of a first TIA (transimpedance amplifier) and a second TIA; configuring a first gain level of the first TIA based on a feedback resistance and a reference current applied at an input to the first TIA; configuring a second gain level of the se…
Who is the assignee on this patent?
Luxtera Llc, Cisco Tech Inc
What technology area does this patent fall under?
Primary CPC classification H03F1/086. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 21 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).