Quality factor estimation of an inductive element

US11588353B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11588353-B2
Application numberUS-202117461305-A
CountryUS
Kind codeB2
Filing dateAug 30, 2021
Priority dateAug 31, 2020
Publication dateFeb 21, 2023
Grant dateFeb 21, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present disclosure relates to a device comprising an inductive element and a first capacitive element series connected between a first node and a second node, a first MOS transistor connected between the first node and a third node configured to receive a reference potential, the second node being coupled directly or via a second MOS transistor to the third node, a second capacitive element connected between a fourth node and an interconnection node between the first capacitive element and the inductive element, a current generator configured to provide an AC current to the fourth node, and a switch connected between the fourth node and the third node.

First claim

Opening claim text (preview).

What is claimed is: 1. A device comprising: an inductive element and a first capacitive element series-connected between a first node and a second node; a first metal-oxide-semiconductor (MOS) transistor connected between the first node and a third node configured to receive a reference potential, the second node being coupled directly or via a second MOS transistor to the third node; a second capacitive element connected between a fourth node and an interconnection node between the first capacitive element and the inductive element; a current generator configured to provide an alternating current (AC) current to the fourth node; and a switch connected between the fourth node and the third node. 2. The device according to claim 1 , wherein a first capacitance of the first capacitive element is at least 100 times higher than a second capacitance of the second capacitive element. 3. The device according to claim 1 , wherein the current generator is connected between the fourth node and a fifth node configured to receive a supply voltage. 4. The device according to claim 3 , wherein the first MOS transistor is part of a half bridge connected between the third node and a sixth node configured to receive a second supply voltage. 5. The device according to claim 4 , wherein the second MOS transistor is part of another half bridge connected the third and sixth nodes. 6. The device according to claim 1 , wherein a frequency of the current generator is controllable. 7. The device according to claim 6 , further comprising a circuit configured to control the frequency of the current generator so that the frequency of the current generator is equal to a frequency of a voltage of the interconnection node. 8. The device according to claim 7 , further comprising a second circuit configured to measure the frequency of the voltage of the interconnection node. 9. The device according to claim 7 , wherein the circuit comprises a detector configured to provide a binary signal and to switch the binary signal each time the voltage of the interconnection node crosses the reference potential, and wherein the current generator is configured to switch the AC current between a high level and a low level at each switching of the binary signal. 10. The device according to claim 9 , further comprising a second circuit configured to measure the frequency of the voltage of the interconnection node, wherein the second circuit comprises a counter configured to measure a frequency of the binary signal. 11. The device according to claim 1 , further comprising a circuit configured to measure a voltage of the interconnection node. 12. The device according to claim 1 , further comprising a control circuit configured to couple the first and second nodes to the third node and to open the switch during a phase of estimation of a quality factor of the inductive element, and to close the switch otherwise. 13. A wireless charger comprising: an antenna comprising an inductive element and a first capacitive element series-connected between a first node and a second node; and an electronic device comprising: a first metal-oxide-semiconductor (MOS) transistor connected between the first node and a third node configured to receive a reference potential, the second node being coupled directly or via a second MOS transistor to the third node; a second capacitive element connected between a fourth node and an interconnection node between the first capacitive element and the inductive element; a current generator configured to provide an alternating current (AC) current to the fourth node; and a switch connected between the fourth node and the third node. 14. The wireless charger according to claim 13 , wherein a first capacitance of the first capacitive element is at least 100 times higher than a second capacitance of the second capacitive element. 15. The wireless charger according to claim 13 , wherein the current generator is connected between the fourth node and a fifth node configured to receive a supply voltage. 16. The wireless charger according to claim 13 , wherein the first MOS transistor is part of a half bridge connected between the third node and a sixth node configured to receive a second supply voltage. 17. The wireless charger according to claim 13 , wherein the second MOS transistor is part of another half bridge connected the third and sixth nodes. 18. An electronic device, comprising: an inductive element and a first capacitive element series-connected between a first node and a second node; a first metal-oxide-semiconductor (MOS) transistor connected between the first node and a third node coupled to a reference potential, the second node being coupled directly or via a second MOS transistor to the third node; a second capacitive element connected between a fourth node and an interconnection node between the first capacitive element and the inductive element; a current generator configured to provide an alternating current to the fourth node; a switch connected between the fourth node and the third node, the switch configured to be in an OPEN position at a beginning of an estimation phase of a quality factor of the inductive element, the first and second nodes being coupled to the third node during the estimation phase, the switch further configured to be in a CLOSED position at an end of the estimation phase; a first circuit configured to measure a voltage of the interconnection node during the estimation phase in response to the AC current having a frequency equal to a resonance frequency of the series-connected inductive element and the first capacitive element; and a second circuit configured to measure the resonance frequency. 19. The electronic device of claim 18 , wherein the second circuit is further configured to estimate the quality factor of the inductive element based on the measured voltage, a capacitance value of the first capacitive element, and a value of the AC current. 20. The electronic device of claim 18 , wherein a first capacitance of the first capacitive element is at least 100 times higher than a second capacitance of the second capacitive element.

Assignees

Inventors

Classifications

  • H02J50/12Primary

    of the resonant type · CPC title

  • Measuring quality factor or dielectric loss, e.g. loss angle, or power factor (power factor related to power measurements G01R21/006; testing capacitors G01R31/016) · CPC title

  • Half-bridge at primary side of an isolation transformer · CPC title

  • H02J50/005Primary

    Mechanical details of housing or structure aiming to accommodate the power transfer means, e.g. mechanical integration of coils, antennas or transducers into emitting or receiving devices · CPC title

  • responsive to the presence of foreign objects, e.g. detection of living beings · CPC title

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What does patent US11588353B2 cover?
The present disclosure relates to a device comprising an inductive element and a first capacitive element series connected between a first node and a second node, a first MOS transistor connected between the first node and a third node configured to receive a reference potential, the second node being coupled directly or via a second MOS transistor to the third node, a second capacitive element…
Who is the assignee on this patent?
Stmicroelectronics Grand Ouest Sas, St Microelectronics Srl
What technology area does this patent fall under?
Primary CPC classification H02J50/12. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 21 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).