Fault detection for a solid state power converter

Patent metadata

Field	Value
Publication number	US-11588322-B2
Application number	US-202017100225-A
Country	US
Kind code	B2
Filing date	Nov 20, 2020
Priority date	Nov 20, 2020
Publication date	Feb 21, 2023
Grant date	Feb 21, 2023

Abstract

In some examples, this disclosure describes a method for detecting a fault in an electrical power system comprising a bus connected between a first solid state power converter and a second solid state power converter. The method includes receiving, at a controller of the electrical power system, a first signal indicating a current at a source side of the first solid state power converter, wherein the source side of the first solid state power converter is connected to a power source of the electrical power system. The method also includes receiving, at the controller, a second signal indicating a current at the bus and determining, by the controller, that a fault occurred in the electrical power system based on the first signal and further based on the second signal. The method further includes controlling the first solid state power converter in response to determining that the fault occurred.

First claim

What is claimed is:

1. A method for detecting a fault in an electrical power system comprising a bus connected between a first solid state power converter and a second solid state power converter, the method comprising:
receiving, at a controller of the electrical power system, a first signal indicating a current flowing through a source side of the first solid state power converter, wherein the source side of the first solid state power converter is connected to a power source of the electrical power system, wherein a first load is connected to the bus, and wherein a second load is connected to a load side of the second solid state power converter;
receiving, at the controller, a second signal indicating a current flowing through a bus side of the first solid state power converter to the bus;
determining, by processing circuitry of the controller, that a short circuit fault occurred in the electrical power system based on the first signal and further based on the second signal; and
controlling, by the controller, the first solid state power converter to deactivate switches of the first solid state power converter in response to determining that the short circuit fault occurred, wherein deactivating the switches of the first solid state power converter disrupts current flowing to the first load and the second load.

2. The method of claim 1 , further comprising:
determining that a magnitude of the second signal is greater than a threshold level; and
deactivating bus-side switches of the first solid state power converter in response to determining that the magnitude of the second signal is greater than the threshold level.

3. The method of claim 2 , wherein the threshold level is a first threshold level, the method further comprising:
determining that a magnitude of the first signal is less than a second threshold level; and
deactivating the bus-side switches in response to determining that the magnitude of the first signal is less than the second threshold level and in response to determining that the magnitude of the second signal is greater than the first threshold level.

4. The method of claim 1 , further comprising:
determining that a magnitude of the first signal is greater than a threshold level; and
deactivating source-side switches of the first solid state power converter in response to determining that the magnitude of the first signal is greater than the threshold level.

5. The method of claim 4 , wherein the threshold level is a first threshold level, the method further comprising:
determining that a magnitude of the second signal is less than a second threshold level; and
deactivating the source-side switches in response to determining that the magnitude of the first signal is greater than the first threshold level and in response to determining that the magnitude of the second signal is less than the second threshold level.

6. The method of claim 1 , further comprising:
determining estimated values of inductances in the electrical power system based on the first signal and the second signal;
determining a desired capacitance for a middle capacitor of the first solid state power converter based on the estimated values of inductances; and
controlling a network of switches based on the desired capacitance to trim an actual capacitance of the middle capacitor.

7. The method of claim 1 , wherein the controller of the electrical power system is a first controller of one or more controllers of the electrical power system, wherein a first load receives electrical power from the bus, the method further comprising:
receiving, at the one or more controllers, a third signal indicating a current flowing through a bus side of the second solid state power converter, wherein the source side of the second solid state power converter is connected to the bus;
receiving, at the one or more controllers, a fourth signal indicating a current flowing through the load side of the second solid state power converter to the second load;
determining, by the one or more controllers, that a short circuit fault occurred in the electrical power system based on the third signal and further based on the fourth signal; and
controlling, by the one or more controllers, the second solid state power converter to deactivate switches of the second solid state power converter in response to determining that the short circuit fault occurred, wherein deactivating the switches of the second solid state power converter does not reduce the electrical power received by the first load.

8. A system comprising:
a first solid state power converter including:
a first set of switches connected to a source side of the first solid state power converter;
a second set of switches connected to a bus side of the first solid state power converter; and
a first middle capacitor connected between the first set of switches and the second set of switches;

a second solid state power converter including:
a third set of switches connected to a bus side of the second solid state power converter;
a fourth set of switches connected to a load side of the second solid state power converter; and
a second middle capacitor connected between the third set of switches and the fourth set of switches;

a power source connected to the source side of the first solid state power converter;
a bus connected to the bus side of the first solid state power converter and to the bus side of the second solid state power converter;
a first load connected to the bus;
a second load connected to the load side of the second solid state power converter; and
a controller configured to open one or more of the fourth set of switches in response to detecting a fault, wherein opening the one or more of the fourth set of switches disrupts current flowing to the second load without disrupting current flowing to the first load.

9. The system of claim 8 , wherein a capacitance of the second middle capacitor is selected based on a threshold level for a current in the second solid state power converter, a voltage level outputted by the power source, a first inductance at the bus side of the second solid state power converter, and a second inductance at the load side of the second solid state power converter.

10. The system of claim 9 , wherein the capacitance of the second middle capacitor is selected based on a formula in which the capacitance of the second middle capacitor is proportional to:
a square of the threshold level for the current at the load side of the second solid state power converter; and
the first inductance at the bus side of the second solid state power converter.

11. The system of claim 8 , further comprising a first controller including processing circuitry, wherein the first controller is configured to:
receive a first signal indicating a current at the source side of the first solid state power converter;
receive a second signal indicating a current at a bus side of the first solid state power converter; and
control the first solid state power converter,
wherein the processing circuitry of the first controller is configured to:
determine that the fault occurred in the electrical power system based on the first signal and further based on the second signal; and
cause the first controller to deactivate at least one switch of the first solid state power converter in response to determining that the fault occurred.

12. The system of claim 11 , wherein the processing circuitry is configured to:
determine that a magnitude of the second signal is greater than a threshold level; and
cause the first controller to deactivate the second set of switches in response to determining that the magnitude of

Assignees

• Rolls Royce Nam Tech Inc
• Rolls Royce Singapore Pte Ltd

Inventors

• Gajanayake Chandana Jayampathi
• Yang Yu
• Loder David
• Gupta Amit Kumar

Classifications

• H02H1/0007

  concerning the detecting means (in general G01R or other subclasses of G01; reed switches H01H71/2445) · CPC title

• H02H7/1213 Primary

  for DC-DC converters · CPC title

• H02H7/125

  for rectifiers · CPC title

• H02M3/07

  using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps} · CPC title