Display panel and manufacturing method thereof, control method and display apparatus

Patent metadata

Field	Value
Publication number	US-11580925-B2
Application number	US-202117500964-A
Country	US
Kind code	B2
Filing date	Oct 14, 2021
Priority date	Feb 23, 2021
Publication date	Feb 14, 2023
Grant date	Feb 14, 2023

Abstract

Provided are a display panel and manufacturing method thereof, control method and display apparatus. The display panel includes a first substrate including first base substrate and driving structure layer, and a second substrate including second base substrate and black matrix layer, driving structure layer includes multiple switching transistors, the display panel includes multiple pixel units, each pixel unit includes a switching transistor. One side of black matrix layer close to first substrate is provided with multiple groove structures corresponding to multiple pixel units one-to-one. Orthographic projection of black matrix layer on first base substrate covers those of multiple switching transistors on first base substrate, and orthographic projection of the groove structure on first base substrate at least partially overlaps with that of a channel region of switching transistor in corresponding pixel unit on first base substrate to enable light meeting preset wavelength condition to be incident into the display panel.

First claim

What we claim is:

1. A display panel, comprising a first substrate and a second substrate disposed oppositely, wherein the first substrate comprises a first base substrate and a driving structure layer disposed on the first base substrate, and the second substrate comprises a second base substrate and a black matrix layer disposed on the second base substrate, the driving structure layer comprises a plurality of switching transistors, and the display panel comprises a plurality of pixel units, wherein each pixel unit comprises a switching transistor;
one side of the black matrix layer close to the first substrate is provided with a plurality of groove structures which correspond to a plurality of pixel units in a one-to-one manner; and
an orthographic projection of the black matrix layer on the first base substrate covers orthographic projections of a plurality of switching transistors on the first base substrate, and an orthographic projection of the groove structure on the first base substrate at least partially overlaps with an orthographic projection of a channel region of a switching transistor in a corresponding pixel unit on the first base substrate to enable light meeting a preset wavelength condition to be incident into the display panel;
wherein the groove structure comprises at least one groove; a difference between groove areas of any two groove structures is smaller than a threshold area, wherein the groove area is a sum of cross-sectional areas of all grooves in the groove structure; and
groove structures corresponding to pixel units in a same row or column are irregularly disposed.

2. The display panel according to claim 1 , wherein a cross section of the groove is U-shaped or square.

3. The display panel according to claim 2 , wherein a thickness of the black matrix layer is 1 to 2 microns, and a width of the black matrix layer is 20 to 40 microns; and
a width of the groove is 3 to 5 microns, and a depth of the groove is 0.7 to 1.8 microns.

4. The display panel according to claim 1 , wherein a depth of the groove is 70% to 90% of a thickness of the black matrix layer.

5. The display panel according to claim 1 , wherein the first substrate further comprises a pixel electrode layer disposed on one side of the driving structure layer away from the first base substrate, and the pixel electrode layer comprises a plurality of pixel electrodes, each pixel unit comprises a pixel electrode, and pixel electrodes of adjacent pixel units are disposed at intervals; and
the pixel electrodes are transparent electrodes and are block electrodes.

6. The display panel according to claim 5 , wherein the first substrate further comprises a common electrode layer disposed on one side of the pixel electrode layer away from the first base substrate; the common electrode layer comprises N common electrodes, each pixel unit comprises a common electrode, and a plurality of pixel units share one common electrode, N≥1;
an orthographic projection of the common electrode on the first base substrate at least partially overlaps with an orthographic projection of a pixel electrode of a pixel unit on which the common electrode is located on the first base substrate; and
the common electrodes are transparent electrodes and are slit electrodes.

7. The display panel according to claim 6 , wherein an area of each common electrode is same.

8. The display panel according to claim 6 , wherein the first substrate further comprises a plurality of gate lines extending along a first direction and disposed along a second direction and data lines extending along the second direction and disposed along the first direction; the pixel units are defined by crossing of the gate lines and the data lines; a length of the gate lines along the second direction is greater than a length of the data lines along the first direction;
the first substrate further comprises N detection signal lines extending along the second direction and disposed along the first direction;
the detection signal lines are disposed on a same layer as the data lines, and correspond to the common electrodes in a one-to-one manner and are electrically connected to corresponding common electrodes; and an orthographic projection of the black matrix layer on the first base substrate covers orthographic projections of the detection signal lines on the first base substrate, and there is an overlapping region between an orthographic projection of the detection signal line on the first base substrate and an orthographic projection of a corresponding common electrode on the first base substrate.

9. The display panel according to claim 8 , wherein a length of the detection signal lines along the second direction is 1 to 2 times as long as that of the data lines along the second direction.

10. The display panel according to claim 8 , wherein the first substrate further comprises a first insulating layer, a first metal layer, a second insulating layer, a semiconductor layer, a second metal layer, a third insulating layer and a fourth insulating layer sequentially disposed on the first base substrate, wherein the pixel electrode layer is disposed between the third insulating layer and the fourth insulating layer, and the common electrode layer is disposed on one side of the fourth insulating layer away from the first base substrate; and
the first metal layer comprises a gate line and a gate electrode of a switching transistor, the semiconductor layer comprises an active layer of the switching transistor, and the second metal layer comprises a data line, a detection signal line and source and drain electrodes of the switching transistor.

11. The display panel according to claim 10 , wherein the third insulating layer and the fourth insulating layer are provided with vias, and the common electrodes are electrically connected to corresponding detection signal lines through the vias.

12. The display panel according to claim 10 , wherein a manufacturing material of the semiconductor layer comprises amorphous silicon.

13. The display panel according to claim 8 , wherein the display panel further comprises a processor;
the processor is electrically connected to the detection signal lines, and is configured to receive a detection signal from the detection signal lines, determine a position of light meeting the preset wavelength condition according to the detection signal, and control display of a pixel unit at the position of the light meeting the preset wavelength condition.

14. A control method of a display panel, applied to the display panel of claim 8 , and comprising:
receiving a detection signal from the detection signal lines;
determining a position of light meeting the preset wavelength condition according to the detection signal; and
controlling display of a pixel unit at the position of the light meeting the preset wavelength condition.

15. The control method according to claim 14 , wherein after determining the position of the light meeting the preset wavelength condition according to the detection signal, the method further comprises:
adjusting a refresh frequency of a signal provided to a pixel electrode in the pixel unit at the position of the light meeting the preset wavelength condition.

16. The display panel according to claim 1 , wherein a length of the channel region of the switching transistor is 2 to 4 microns and a width of the channel region of the switching transistor is 10 to 100 microns.

17. The display panel according to claim 1 , wherein the light meeting the preset wavelength condition is laser.

18. A disp

Assignees

• Beijing Boe Display Tech Co
• Boe Technology Group Co Ltd

Inventors

• Li Xingliang
• Zhang Jian
• Jiang Xiaoning
• Li Peng
• Li Wenyu

Classifications

• G02F1/1368

  in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title

• G02F1/133512

  Light shielding layers, e.g. black matrix (G02F1/136209 takes precedence) · CPC title

• G02F1/136286 Primary

  Wiring, e.g. gate line, drain line · CPC title

• G02F2202/12

  photoconductor · CPC title

• G02F1/136236

  using a grey or half tone lithographic process · CPC title