Display device performing multi-frequency driving, and method of operating a display device

US11580886B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11580886-B2
Application numberUS-202117202769-A
CountryUS
Kind codeB2
Filing dateMar 16, 2021
Priority dateJul 23, 2020
Publication dateFeb 14, 2023
Grant dateFeb 14, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display device includes a display panel including a first partial panel region and a second partial panel region, and a panel driver which drives the display panel. The panel driver determines a first driving frequency for the first partial panel region and a second driving frequency for the second partial panel region. In a case where the first driving frequency and the second driving frequency are different from each other, the panel driver sets a boundary portion including a boundary between the first partial panel region and the second partial panel region, and determines a third driving frequency for the boundary portion to be between the first driving frequency and the second driving frequency.

First claim

Opening claim text (preview).

What is claimed is: 1. A display device comprising: a display panel including a plurality of data lines, a first partial panel region and a second partial panel region; and a panel driver which drives the display panel, wherein the panel driver determines a first driving frequency for the first partial panel region and a second driving frequency for the second partial panel region, and wherein, in a case where the second driving frequency is lower than the first driving frequency, the panel driver provides data voltages to the first and second partial panel regions in a first frame period, provides the data voltages to the first partial panel region during a data writing period in a second frame period, which is a period allocated for the first partial panel region within the second frame period, determines a voltage level of a blank voltage for the second partial panel region, and applies the blank voltage to the plurality of data lines to provide the blank voltage to the second partial panel region during a holding period in the second frame period, which is a period allocated for the second partial panel region within the second frame period. 2. The display device of claim 1 , wherein, in the first frame period, data writing and biasing operations for pixels of the first and second partial panel regions are performed based on the data voltages, and wherein, in the second frame period, the data writing and biasing operations for the pixels of the first partial panel region are performed based on the data voltages, and biasing operations for the pixels of the second partial panel region are performed based on the blank voltage. 3. The display device of claim 2 , wherein, in the first frame period, by the data writing and biasing operations, voltages generated by subtracting threshold voltages of driving transistors of the pixels of the first and second partial panel regions from the data voltages are stored in storage capacitors of the pixels of the first and second partial panel regions, and first on-biases based on the data voltages are applied to the driving transistors of the pixels of the first and second partial panel regions, wherein, in the second frame period, by the data writing and biasing operations, the voltages generated by subtracting the threshold voltages of the driving transistors of the pixels of the first partial panel region from the data voltages are stored in the storage capacitors of the pixels of the first partial panel region, and the first on-biases based on the data voltages are applied to the driving transistors of the pixels of the first partial panel region, and wherein, in the second frame period, by the biasing operations, second on-biases based on the blank voltage are applied to the driving transistors of the pixels of the second partial panel region. 4. The display device of claim 1 , wherein the panel driver determines the voltage level of the blank voltage for the second partial panel region as a voltage level of the data voltage corresponding to a gray level higher than a black gray level. 5. The display device of claim 1 , wherein the panel driver divides input image data for the display panel into first partial image data for the first partial panel region and second partial image data for the second partial panel region, and determines the voltage level of the blank voltage for the second partial panel region by analyzing the second partial image data for the second partial panel region. 6. The display device of claim 5 , wherein the panel driver determines a maximum gray level of gray levels represented by the second partial image data for the second partial panel region, and determines the voltage level of the blank voltage for the second partial panel region as a voltage level of the data voltage corresponding to the maximum gray level. 7. The display device of claim 5 , wherein the panel driver determines a maximum gray level of gray levels represented by the second partial image data for the second partial panel region, and determines the voltage level of the blank voltage for the second partial panel region as a voltage level of the data voltage corresponding to a gray level higher than a black gray level and lower than the maximum gray level. 8. The display device of claim 5 , wherein the panel driver determines an average gray level of gray levels represented by the second partial image data for the second partial panel region, and determines the voltage level of the blank voltage for the second partial panel region as a voltage level of the data voltage corresponding to the average gray level. 9. The display device of claim 1 , wherein the panel driver divides input image data for the display panel into first partial image data for the first partial panel region and second partial image data for the second partial panel region, and determines the voltage level of the blank voltage for the second partial panel region by analyzing the first partial image data for the first partial panel region. 10. The display device of claim 9 , wherein the panel driver determines the voltage level of the blank voltage for the second partial panel region based on a maximum gray level or an average gray level of gray levels represented by the first partial image data for the first partial panel region. 11. The display device of claim 1 , wherein each pixel in the first and second partial panel regions includes: a driving transistor which generates a driving current; a switching transistor which transfers the data voltage or the blank voltage to a source of the driving transistor in response to a gate writing signal; a compensation transistor which diode-connects the driving transistor in response to a gate compensation signal; a storage capacitor which stores a voltage generated by subtracting a threshold voltage of the driving transistor from the data voltage; a first initialization transistor which provides a first initialization voltage to the storage capacitor and a gate of the driving transistor in response to a gate initialization signal; a first emission transistor which couples a line of a power supply voltage to the source of the driving transistor in response to an emission signal; a second emission transistor which couples a drain of the driving transistor to an organic light emitting diode in response to the emission signal; a second initialization transistor which provides a second initialization voltage to the organic light emitting diode in response to the gate writing signal for a next pixel row; and the organic light emitting diode which emits light based on the driving current. 12. The display device of claim 11 , wherein at least one selected from the driving, switching, compensation, first initialization, first emission, second emission and second initialization transistors is implemented with a p-type metal-oxide-semiconductor transistor, and at least one selected from the driving, switching, compensation, first initialization, first emission, second emission and second initialization transistors is implemented with an n-type metal-oxide-semiconductor transistor. 13. The display device of claim 1 , wherein the panel driver includes: a data driver which provides the data voltages or the blank voltage to the display panel; a scan driver which provides a gate initialization signal, a gate writing signal and a gate compensation signal to the display panel; an emission driver which provides an emission signal to the display panel; and a controller which controls the data driver, the scan driver and the emission driver, determines the first and second driving frequencies for the first and

Assignees

Inventors

Classifications

  • using an active matrix (G09G3/367 - G09G3/3696 take precedence) · CPC title

  • G09G3/3225Primary

    using an active matrix · CPC title

  • forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title

  • with pixel circuitry controlling the voltage across the light-emitting element · CPC title

  • with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title

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What does patent US11580886B2 cover?
A display device includes a display panel including a first partial panel region and a second partial panel region, and a panel driver which drives the display panel. The panel driver determines a first driving frequency for the first partial panel region and a second driving frequency for the second partial panel region. In a case where the first driving frequency and the second driving freque…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/3225. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 14 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).