Totem-pole power factor correction circuit

Patent metadata

Field	Value
Publication number	US-11575315-B2
Application number	US-202117405852-A
Country	US
Kind code	B2
Filing date	Aug 18, 2021
Priority date	Dec 31, 2020
Publication date	Feb 7, 2023
Grant date	Feb 7, 2023

Abstract

A totem-pole PFC circuit is provided. The totem-pole PFC circuit includes an inductor, a first bridge arm and a second bridge arm. The first bridge arm includes a first switch and a second switch connected in series. A first middle node connected between the first and second switches is coupled to a first terminal of an AC power source through the inductor. The second bridge arm connected to the first bridge arm in parallel includes a third switch and a fourth switch connected in series. A second middle node connected between the third and fourth switches is coupled to a second terminal of the AC power source. When a polarity of the AC power source is changed, a change time of a voltage on the second middle node is longer than a preset time not less than 20 μs.

First claim

What is claimed is:

1. A totem-pole PFC circuit, having an input connected to an AC power source and an output providing a bus voltage, comprising: an inductor; a first bridge arm comprising a first switch and a second switch connected in series, wherein a first middle node connected between the first and second switches is coupled to a first terminal of the AC power source through the inductor; and a second bridge arm connected to the first bridge arm in parallel, wherein the second bridge arm comprises a third switch and a fourth switch connected in series, and a second middle node connected between the third and fourth switches is coupled to a second terminal of the AC power source;
wherein when a polarity of the AC power source is changed, a change time of a voltage on the second middle node is longer than a preset time, and the preset time is not less than 20 ps, wherein the change time is a first time period of the voltage on the second middle node increasing from zero to the bus voltage or a first time period of the voltage on the second middle node decreasing from the bus voltage to zero.

2. The totem-pole PFC circuit according to claim 1 , wherein the first and second switches are MOSFETs, IGBTs, GaN transistors or SiC transistors.

3. The totem-pole PFC circuit according to claim 1 , wherein the third and fourth switches are MOSETs, IGBTs, GaN transistors or SiC transistors.

4. The totem-pole PFC circuit according to claim 3 , wherein the totem-pole PFC circuit controls the change time of the voltage on the second middle node to be longer than the preset time by slowing down a switching speed of the third and fourth switches of the second bridge arm.

5. The totem-pole PFC circuit according to claim 4 , wherein there is a second time period starting before and ending after a moment that the polarity of the AC power source is changed, and neither the first bridge arm nor the second bridge arm works during the second time period.

6. The totem-pole PFC circuit according to claim 5 , wherein before the polarity of the AC power source is changed, the first bridge arm stops working firstly, and then the second bridge arm stops working; wherein after the polarity of the AC power source is changed, the second bridge arm starts to work firstly, and then the first bridge arm starts to work.

7. The totem-pole PFC circuit according to claim 4 , wherein a first additional capacitor is disposed between a gate and a drain of the third switch, and another first additional capacitor is disposed between a gate and a drain of the fourth switch.

8. The totem-pole PFC circuit according to claim 4 , wherein a second additional capacitor is disposed between a gate and a source of the third switch, and another second additional capacitor is disposed between a gate and a source fourth switch.

9. The totem-pole PFC circuit according to claim 4 , wherein the totem-pole PFC circuit slows down the switching speed of the third and fourth switches by increasing a driving resistance between a gate and a source of the third switch and a driving resistance between a gate and a source of fourth switch respectively.

10. The totem-pole PFC circuit according to claim 4 , wherein the totem-pole PFC circuit slows down the switching speed of the third and fourth switches by decreasing a driving current of the third switch and a driving current of fourth switches.

11. The totem-pole PFC circuit according to claim 1 , wherein the totem-pole PFC circuit controls the change time of the voltage on the second middle node to be longer than the preset time by controlling a switching sequence of the first and second switches of the first bridge arm.

12. The totem-pole PFC circuit according to claim 11 , wherein the third and fourth switches are diodes, MOSFETs, IGBTs, GaN transistors or SiC transistors.

13. The totem-pole PFC circuit according to claim 12 , wherein there is a second time period starting before and ending after a moment that the polarity of the AC power source is changed, and neither the first bridge arm nor the second bridge arm works during the second time period.

14. The totem-pole PFC circuit according to claim 13 , wherein before the polarity of the AC power source is changed, the first bridge arm stops working firstly, and then the second bridge arm stops working; wherein after the polarity of the AC power source is changed, the first bridge arm starts to work firstly, and then the second bridge arm starts to work.

15. The totem-pole PFC circuit according to claim 14 , wherein after the second time period, the first switch of the first bridge arm is controlled to work during the first time period in a negative half cycle of the AC power source, and the second switch of the first bridge arm is controlled to work during the first time period in a positive half cycle of the AC power source.

16. The totem-pole PFC circuit according to claim 15 , wherein during the first time period, a switching frequency of the first switch or the second switch is fixed, and a duty ratio of the first switch or the second switch is adjusted for controlling the change time of the voltage on the second middle node.

17. The totem-pole PFC circuit according to claim 15 , wherein during the first time period, a duty ratio of the first switch or the second switch is fixed, and a switching frequency of the first switch or the second switch is adjusted for controlling the change time of the voltage on the second middle node.

18. The totem-pole PFC circuit according to claim 15 , wherein during the first time period, a peak current mode control is applied to the totem-pole PFC circuit through the first switch or the second switch, and the totem-pole PFC circuit is controlled to work in a critical continuous mode.

Assignees

• Delta Electronics Shanghai Co

Inventors

• Fu Qi
• Song Haibin
• Xu Daofei
• Zhang Jinfa

Classifications

• H02M1/0085

  Partially controlled bridges · CPC title

• H02M1/346

  Passive non-dissipative snubbers · CPC title

• H02M1/12

  Arrangements for reducing harmonics from AC input or output · CPC title

• H02M1/0029

  Circuits or arrangements for limiting the slope of switching signals, e.g. slew rate · CPC title

• H02M1/123 Primary

  Suppression of common mode voltage or current · CPC title