System for real-time scheduling in an asynchronous transfer mode communication network

US11573825B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11573825-B2
Application numberUS-202117205065-A
CountryUS
Kind codeB2
Filing dateMar 18, 2021
Priority dateMar 16, 2018
Publication dateFeb 7, 2023
Grant dateFeb 7, 2023

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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A real-time feasibility device includes circuitry configured to sort tasks into a first scheduling priority order; split the sorted tasks into a first subset which can be scheduled using an inexact condition test and a second subset which cannot be scheduled using the inexact condition test; test the first subset using the inexact condition test; sort the tested first subset into a second scheduling priority order; sort the second subset into a third scheduling priority order; filter out one or more tasks of the second subset which cannot be scheduled using the inexact condition test or the exact condition test; test remaining tasks of the second subset using the exact condition test; sort the tested remaining tasks of the second subset into a fourth scheduling priority order; and execute the sorted and tested first subset and the sorted and tested remaining tasks of the second subset.

First claim

Opening claim text (preview).

The invention claimed is: 1. A real-time system for determining rate-monotonic scheduling feasibility of tasks of an asynchronous transfer mode communication network and executing feasible tasks, comprising: a pre-emptive real-time database; and a pre-emptive real-time processor having circuitry configured to: sort a set of tasks of the asynchronous transfer mode communication network into a first scheduling priority order in a descending order of priority based on activation rates of the tasks of the set of tasks; split the sorted set of tasks into a first subset which can be scheduled using an inexact condition test and a second subset which cannot be scheduled using the inexact condition test, wherein the inexact condition test is an LL-bound test: transfer a first enhanced data packet having a first set of processing instructions from a sorter engine to a feasibility tester engine; test the first subset according to the first set of processing instructions using the inexact condition test; sort the tested first subset into a second scheduling priority order in a descending order of priority based on activation rates of the tasks of the tested first subset: sort the second subset into a third scheduling priority order in an ascending order of priority based on activation rates of the tasks of the second subset; determine whether the second subset can be scheduled using an exact condition test if a calculated response-time for each task of the second subset is less than a corresponding deadline; filter out one or more tasks of the second subset which cannot be scheduled using the inexact condition test or the exact condition test; transfer a second enhanced data packet having a second set of processing instructions from the sorter engine to the feasibility tester engine; test remaining tasks of the second subset according to the second set of processing instructions using the exact condition test, wherein the exact condition test is a response time analysis (RTA) test; sort the tested remaining tasks of the second subset into a fourth scheduling priority order; execute the sorted and tested first subset: execute the sorted and tested remaining tasks of the second subset; and transfer and retrieve data to and from the pre-emptive real-time database. 2. The system of claim 1 , wherein the system comprises a uniprocessor system. 3. The system of claim 1 , configured to be executed with one of an operating system scheduler, cloud-based gaming, robotics, avionics, or vehicles. 4. The system of claim 1 , wherein the pre-emptive real-time processor includes the sorter engine, a splitter engine, the feasibility tester engine, and an execution engine. 5. The system of claim 1 , wherein the pre-emptive real-time database includes a plurality of priority lists, a plurality of divided test lists, and a plurality of test results.

Assignees

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Classifications

  • G06F9/4881Primary

    Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues · CPC title

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Frequently asked questions

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What does patent US11573825B2 cover?
A real-time feasibility device includes circuitry configured to sort tasks into a first scheduling priority order; split the sorted tasks into a first subset which can be scheduled using an inexact condition test and a second subset which cannot be scheduled using the inexact condition test; test the first subset using the inexact condition test; sort the tested first subset into a second sched…
Who is the assignee on this patent?
Univ Imam Abdulrahman Bin Faisal
What technology area does this patent fall under?
Primary CPC classification G06F9/4881. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 07 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).