Method for manufacturing IGBT device

US11563103B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11563103-B2
Application numberUS-202117230231-A
CountryUS
Kind codeB2
Filing dateApr 14, 2021
Priority dateAug 31, 2020
Publication dateJan 24, 2023
Grant dateJan 24, 2023

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A method for manufacturing an IGBT device includes: forming a source of the IGBT device in a substrate, wherein the substrate is an MCZ substrate; performing annealing processing on the substrate, wherein a layer of oxide is formed on the surface of the source during an annealing process; forming an interlayer dielectric layer on the substrate, wherein the interlayer dielectric layer is comprised of a silicon nitride layer, a first type oxide layer, and a second type oxide layer, and a material used to form the first type oxide layer is different from a material used to form the second type oxide layer; and performing nitrogen annealing processing on the substrate.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for manufacturing an IGBT device, comprising: forming a source of the IGBT device in a substrate, wherein the substrate is an MCZ substrate, and wherein a diameter of the substrate is 12 inches; performing annealing processing on the substrate, wherein a layer of oxide is formed on the surface of the source during an annealing process; forming an interlayer dielectric layer on the substrate, wherein the interlayer dielectric layer is comprised of a silicon nitride layer, a first type oxide layer, and a second type oxide layer, and a material used to form the first type oxide layer is different from a material used to form the second type oxide layer; and performing nitrogen annealing processing on the substrate. 2. The method for manufacturing an IGBT device, according to claim 1 , wherein the forming an interlayer dielectric layer on the substrate, comprising: performing an LPCVD process to form the silicon nitride layer on the substrate; and performing PECVD processes to sequentially form the first type oxide layer and the second type oxide layer on the silicon nitride layer. 3. The method for manufacturing an IGBT device, according to claim 2 , wherein the material of the first type oxide layer is silicon rich oxides, and the material of the second type oxide layer is oxides produced by means of chemical reactions. 4. The method for manufacturing an IGBT device, according to claim 2 , wherein the material of the first type oxide layer is oxide produced by a chemical reaction between O3 and TEOS, and the material of the second type oxide layer is oxide obtained from decomposition of TEOS. 5. The method for manufacturing an IGBT device, according to claim 1 , wherein the IGBT device is an FS-type IGBT device. 6. The method for manufacturing an IGBT device, according to claim 1 , wherein before forming a source of the IGBT device on a substrate, the method further comprising: forming a gate structure of the IGBT device. 7. The method for manufacturing an IGBT device, according to claim 1 , wherein forming a source of the IGBT device in a substrate, comprising: implanting N-type doping ions into a body of the IGBT device by means of an ion implantation process, to form the source.

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What does patent US11563103B2 cover?
A method for manufacturing an IGBT device includes: forming a source of the IGBT device in a substrate, wherein the substrate is an MCZ substrate; performing annealing processing on the substrate, wherein a layer of oxide is formed on the surface of the source during an annealing process; forming an interlayer dielectric layer on the substrate, wherein the interlayer dielectric layer is compris…
Who is the assignee on this patent?
Hua Hong Semiconductor Wuxi Ltd, Shanghai Huahong Grace Semiconductor Mfg Corp
What technology area does this patent fall under?
Primary CPC classification H01L29/66325. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 24 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).