Board, optical module, OLT, and information processing method

US11558118B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11558118-B2
Application numberUS-202117244298-A
CountryUS
Kind codeB2
Filing dateApr 29, 2021
Priority dateOct 31, 2018
Publication dateJan 17, 2023
Grant dateJan 17, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Embodiments of this application disclose a board, an optical module, a MAC chip, a DSP, and an information processing method. The board in the embodiments of this application includes a media access control (MAC) chip, a digital signal processor (DSP), and an equalizer. The MAC chip is configured to send first information to the DSP at an optical network unit (ONU) online stage, where the first information includes a first ONU identifier. The DSP is configured to receive the first information, and determine a first reference equalization parameter, where the first reference equalization parameter is related to the first ONU identifier. The DSP is further configured to set an equalization parameter of the equalizer to the first reference equalization parameter.

First claim

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What is claimed is: 1. A board, wherein the board comprises: a media access control (MAC) chip, a digital signal processor (DSP), and an equalizer; wherein the MAC chip is configured to send first information to the DSP at an optical network unit (ONU) online stage, wherein the first information comprises a first ONU identifier; the DSP is configured to receive the first information, and determine a first reference equalization parameter, wherein the first reference equalization parameter is related to the first ONU identifier; and the DSP is further configured to set an equalization parameter of the equalizer to the first reference equalization parameter. 2. The board according to claim 1 , wherein the first information comprises an information field, and the information field comprises the first ONU identifier. 3. The board according to claim 2 , wherein the DSP is configured to set the equalization parameter of the equalizer to the first reference equalization parameter after receiving the first information and before an upstream optical signal corresponding to the first ONU identifier arrives. 4. The board according to claim 2 , wherein the first information further comprises a demarcation field, a start field, and an end field. 5. The board according to claim 1 , wherein the first information comprises an information field, the information field comprises at least one piece of time sequence information, the at least one piece of time sequence information comprises first time sequence information, and the first time sequence information is used to indicate a correspondence between the first ONU identifier and a first upstream transmission time. 6. The board according to claim 5 , wherein the DSP is configured to determine the first reference equalization parameter corresponding to the first ONU identifier, and set the equalization parameter of the equalizer to the first reference equalization parameter before the first upstream transmission time. 7. The board according to claim 1 , further comprising a rate selection (RATE_SEL) pin, wherein that the MAC chip sends the first information to the DSP at the ONU online stage comprises: sending, by the MAC chip, the first information to the DSP through the RATE_SEL pin at the ONU online stage. 8. The board according to claim 1 , wherein the board further comprises a transimpedance amplifier (TIA), the DSP is connected to the TIA, and the DSP is further configured to send a reset signal to the TIA. 9. The board according to claim 8 , wherein there are at least two TIAs, and the TIAs comprise a 50G passive optical network PON TIA and a 10G PON TIA. 10. The board according to claim 9 , wherein the first information further comprises a rate field, and the rate field is used to indicate whether to send the reset signal to the 50G PON TIA or the 10G PON TIA. 11. The board according to claim 10 , further comprising: two reset pins, wherein the MAC chip sends two differential clock signals to the DSP through the two reset pins. 12. The board according to claim 1 , wherein the DSP is further configured to store a correspondence group, wherein the correspondence group comprises at least a correspondence between the first ONU identifier and the first reference equalization parameter; and that the DSP determines the first reference equalization parameter comprises: searching, by the DSP, the correspondence group for the first reference equalization parameter corresponding to the first ONU identifier. 13. The board according to claim 12 , wherein the equalizer is further configured to perform convergence at an ONU registration stage to obtain the first reference equalization parameter; the MAC chip is further configured to allocate, at the ONU registration stage, the first ONU identifier to an ONU that is online, and send the first ONU identifier to the DSP; and the DSP stores the correspondence between the first ONU identifier and the first reference equalization parameter. 14. The board according to claim 1 , wherein the equalizer is further configured to: after the DSP sets the equalization parameter of the equalizer to the first reference equalization parameter, perform convergence on the first reference equalization parameter to obtain a second reference equalization parameter; and the DSP is further configured to set the equalization parameter of the equalizer to the second reference equalization parameter. 15. The board according to claim 1 , wherein the board further comprises an optical module, and the DSP and the equalizer are integrated in the optical module; or the DSP is integrated with the MAC chip; or the equalizer is integrated in the DSP, and the DSP is integrated in the optical module. 16. An optical line terminal (OLT), wherein the OLT comprises the board according to claim 1 . 17. An information processing method, comprising: sending, by a MAC chip, first information to a DSP at an ONU online stage, wherein the first information comprises a first ONU identifier; receiving, by the DSP, the first information, and determining a first reference equalization parameter, wherein the first reference equalization parameter is related to the first ONU identifier; and setting an equalization parameter of an equalizer to the first reference equalization parameter. 18. The method according to claim 17 , wherein the first information comprises an information field, and the information field comprises the first ONU identifier. 19. The method according to claim 18 , wherein the DSP is configured to set the equalization parameter of the equalizer to the first reference equalization parameter after receiving the first information and before an upstream optical signal corresponding to the first ONU identifier arrives. 20. The method according to claim 17 , wherein the method further comprises: storing, by the DSP, a correspondence group, wherein the correspondence group comprises at least a correspondence between the first ONU identifier and the first reference equalization parameter; and the determining, by the DSP, a first reference equalization parameter comprises: searching, by the DSP, the correspondence group for the first reference equalization parameter corresponding to the first ONU identifier.

Assignees

Inventors

Classifications

  • Line equalisers; line build-out devices · CPC title

  • H04B10/27Primary

    Arrangements for networking · CPC title

  • Provisions for optical access or distribution networks, e.g. Gigabit Ethernet Passive Optical Network (GE-PON), ATM-based Passive Optical Network (A-PON), PON-Ring · CPC title

  • Arbitration, scheduling or medium access control aspects · CPC title

  • User Network Interface · CPC title

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Frequently asked questions

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What does patent US11558118B2 cover?
Embodiments of this application disclose a board, an optical module, a MAC chip, a DSP, and an information processing method. The board in the embodiments of this application includes a media access control (MAC) chip, a digital signal processor (DSP), and an equalizer. The MAC chip is configured to send first information to the DSP at an optical network unit (ONU) online stage, where the first…
Who is the assignee on this patent?
Huawei Tech Co Ltd
What technology area does this patent fall under?
Primary CPC classification H04B10/27. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 17 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).