Power converter circuit for a lighting device

Patent metadata

Field	Value
Publication number	US-11553572-B2
Application number	US-202117219071-A
Country	US
Kind code	B2
Filing date	Mar 31, 2021
Priority date	Mar 31, 2020
Publication date	Jan 10, 2023
Grant date	Jan 10, 2023

Abstract

A power converter circuit may include a control circuit configured to generate a drive signal for rendering a semiconductor switch conductive and non-conductive to generate a bus voltage across a bus capacitor. The control circuit may adjust a minimum operating period of the drive signal to a first value when an output power of the power converter circuit is greater than a first threshold and to a second value when the output power is less than a second threshold. The control circuit may comprise a comparator that generates the drive signal in response to a sense voltage and a threshold voltage. When operating in a standby mode, the control circuit may adjust a magnitude of the threshold voltage based on an instantaneous magnitude of an alternating-current line voltage received by the power converter circuit, such that an input current drawn by the power converter circuit is sinusoidal.

First claim

What is claimed is:

1. A power converter circuit configured to generate a bus voltage for powering an electrical load, the power converter circuit comprising:
a bus capacitor configured to store the bus voltage;
a semiconductor switch configured to be rendered conductive and non-conductive to charge the bus capacitor;
a control circuit configured to generate a drive signal for rendering the semiconductor switch conductive and non-conductive, such that the drive signal is characterized by an operating period, the control circuit configured to limit the operating period to a minimum operating period;
wherein the control circuit is configured to determine an output power of the power converter circuit, the control circuit further configured to adjust the minimum operating period to a first value when the output power is greater than a first threshold and to a second value when the output power is less than a second threshold.

2. The power converter circuit of claim 1 , further comprising:
a transformer having a primary winding coupled in series with the semiconductor switch, and a secondary winding coupled in series with the bus capacitor;
wherein the processor is configured to render the semiconductor switch conductive to conduct a primary current through the primary winding to store energy in the transformer, and to render the semiconductor switch non-conductive to conduct a secondary current through the secondary winding to charge the bus capacitor.

3. The power converter circuit of claim 1 , wherein the control circuit is configured to adjust the minimum operating period with respect to time in a range between a high value and a low value.

4. The power converter circuit of claim 1 , wherein the first threshold is greater than the second threshold.

5. The power converter circuit of claim 1 , wherein the first and second thresholds are equal.

6. The power converter circuit of claim 1 , wherein the control circuit is configured to determine the output power based on a current conducted by the electrical load and a magnitude of the bus voltage.

7. The power converter circuit of claim 1 , wherein the control circuit is configured to adjust an operating frequency of the drive signal throughout the duration of a half-cycle of an AC line voltage.

8. The power converter circuit of claim 7 , wherein the control circuit is configured to decrease the operating frequency of the drive signal as an instantaneous magnitude of the AC line voltage increases towards a peak magnitude and increase the operating frequency of the drive signal as the instantaneous magnitude of the AC line voltage decreases towards zero during a second half of the half-cycle of the AC line voltage.

9. The power converter circuit of claim 1 , wherein the control circuit is configured to decrease the operation period of the drive signal as the output power decreases.

10. The power converter circuit of claim 1 , wherein, when the output power is greater than the first threshold, the control circuit is configured to set the nominal minimum operating period to the first value, and adjust the minimal operating period with respect to time in range between a first upper value that is greater than the nominal operating period and a first lower value that is less than the nominal operating period;
wherein, when the output power is less than the second threshold, the control circuit is configured to set the nominal minimum operating period to the second value, and adjust the minimal operating period with respect to time in range between a second upper value that is greater than the nominal operating period and a second lower value that is less than the nominal operating period.

11. A power converter circuit configured to generate a bus voltage for powering an electrical load, the power converter circuit comprising:
a bus capacitor configured to store the bus voltage;
a semiconductor switch configured to be rendered conductive and non-conductive to charge the bus capacitor;
a control circuit configured to:
generate a drive signal for rendering the semiconductor switch conductive and non-conductive to charge the bus capacitor, wherein the drive signal is characterized by an operating period that is limited to a minimum operating period;
determine an output power of the power converter circuit;
determine a nominal minimum operating period based on the output power of the power converter circuit; and
adjust the minimum operating period for the drive signal with respect to time in a range between an upper value that is greater than the nominal operating period and a lower value that is less than the nominal operating period.

12. The power converter circuit of claim 11 , wherein, when the output power is greater than a first threshold, the control circuit is configured to set the nominal minimum operating period to a first value, and adjust the minimal operating period with respect to time in range between a first upper value that is greater than the nominal operating period and a first lower value that is less than the nominal operating period;
wherein, when the output power is less than a second threshold, the control circuit is configured to set the nominal minimum operating period to a second value, and adjust the minimal operating period with respect to time in range between a second upper value that is greater than the nominal operating period and a second lower value that is less than the nominal operating period.

13. The power converter circuit of claim 11 , wherein the control circuit is configured to determine the output power based on a current conducted by the electrical load and a magnitude of the bus voltage.

14. The power converter circuit of claim 11 , further comprising:
a transformer having a primary winding coupled in series with the semiconductor switch, and a secondary winding coupled in series with the bus capacitor;
wherein the processor is configured to render the semiconductor switch conductive to conduct a primary current through the primary winding to store energy in the transformer, and to render the semiconductor switch non-conductive to conduct a secondary current through the secondary winding to charge the bus capacitor.

15. The power converter circuit of claim 11 , wherein the control circuit is configured to decrease the operation period of the drive signal as the output power decreases.

16. A power converter circuit configured to generate a bus voltage for powering an electrical load, the power converter circuit comprising:
a bus capacitor configured to store the bus voltage;
a semiconductor switch configured to be rendered conductive and non-conductive to charge the bus capacitor;
a control circuit configured to determine an output power of the power converter circuit, and generate a drive signal for rendering the semiconductor switch conductive and non-conductive to charge the bus capacitor, wherein the drive signal is characterized by an operating period that is limited to a minimum operating period;
wherein, when the output power is greater than a first threshold, the control circuit is configured to adjust the minimal operating period with respect to time in a range between a first upper value that is greater than a first operating period value and a first lower value that is less than the first operating period value; and
wherein, when the output power is less than a second threshold, the control circuit is configured to adjust the minimal operating period with respect to time in range between a second upper value that is greater than a second operating period value and a second lower value that i

Assignees

• Lutron Tech Co Llc

Inventors

• Bocock Ryan M
• Brogan Quinn

Classifications

• Y02B70/10

  Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes · CPC title

• H05B45/385 Primary

  using flyback topology · CPC title

• H05B45/375

  using buck topology · CPC title

• H02M1/0032

  Control circuits allowing low power mode operation, e.g. in standby mode · CPC title

• H02M1/4258

  using a single converter stage both for correction of AC input power factor and generation of a regulated and galvanically isolated DC output voltage (H02M1/4241 takes precedence) · CPC title