Storage drive with NAND maintenance on basis of segments corresponding to logical erase units

Patent metadata

Field	Value
Publication number	US-11544200-B1
Application number	US-202217901584-A
Country	US
Kind code	B1
Filing date	Sep 1, 2022
Priority date	Sep 9, 2014
Publication date	Jan 3, 2023
Grant date	Jan 3, 2023

Abstract

This disclosure provides techniques hierarchical address virtualization within a memory controller and configurable block device allocation. By performing address translation only at select hierarchical levels, a memory controller can be designed to have predictable I/O latency, with brief or otherwise negligible logical-to-physical address translation time. In one embodiment, address transition may be implemented entirely with logical gates and look-up tables of a memory controller integrated circuit, without requiring processor cycles. The disclosed virtualization scheme also provides for flexibility in customizing the configuration of virtual storage devices, to present nearly any desired configuration to a host or client.

First claim

What is claimed is:

1. A storage device comprising:
flash memory having physical erase units; and
circuitry to:
for an incoming data write request,
derive, from incoming address information, a first address portion, a second address portion and a third address portion,
identify an addressed block device from the first address portion,
identify an addressed segment, within the addressed block device, from the second address portion, wherein the addressed segment is mapped to a first one of the physical erase units,
identify an addressed storage location, within the addressed segment, from the third address portion,
perform a division operation on the third address portion, or information derived therefrom, to identify a physical page within the first one of the physical erase units, and
program associated data into the first one of the physical erase units within the physical page;

maintain metadata for the first one of the physical erase units, the metadata representing a time since data was programmed in the first one of the physical erase units;
responsive to a determination that the metadata meets at least one criterion, copy data from the first one of the physical erase units to a second one of the physical erase units; and
remap the addressed segment to the second one of the physical erase units instead of the first one of the physical erase units.

2. The storage device of claim 1 wherein the division operation is to use a divisor that is not a power of two to identify the physical page within the addressed segment.

3. The storage device of claim 1 wherein, in connection with the copy of data from the first one of the physical erase units to the second one of the physical erase units, the circuitry is to generate metadata for the second one of the physical erase units so as to correspond to a time of programming associated with the copy of data from the first one of the physical erase units to the second one of the physical erase units.

4. The storage device of claim 3 wherein the circuitry is further to automatically control erasure of the first one of the physical erase units in connection with the copy of the data from the first one of the physical erase units to the second one of the physical erase units.

5. The storage device of claim 4 wherein:
the circuitry is further to maintain additional metadata for the first one of the physical erase units which represents a number of times the first one of the physical erase units has been erased; and
in connection with the erase of the first one of the physical erase units, the circuitry is to update the additional metadata to reflect an additional instance that the first one of the physical erase units has been erased.

6. The storage device of claim 5 wherein the storage device is to receive a maintenance request, the maintenance request being effective to cause the circuitry to erase the first one of the physical erase units, and wherein the update of the additional metadata is performed responsive to the erasure, of the first one of the physical erase units, which was performed in association with the maintenance request.

7. The storage device of claim 5 wherein the circuitry is to transmit to the host information which is dependent upon the additional metadata.

8. The storage device of claim 1 wherein:
the physical erase units comprise a third one of the physical erase units;
the third one of the physical erase units is mapped to a second segment;
the storage device is to detect a failure condition of the third one of the physical erase units and is to responsively:
identify another one of the physical erase units, for which the failure condition has not been detected;
remap the second segment to the other one of the physical erase units; and
utilize the other one of the physical erase units to service one or more ensuing incoming data access requests which are directed to the second segment.

9. The storage device of claim 1 wherein:
the circuitry comprises at least one processor; and
the storage device further comprises instructions stored on at least one non-transitory storage medium, said instructions when executed to control the at least one processor so as to operate as special purpose circuitry.

10. The storage device of claim 1 wherein the storage device comprises nonvolatile memory, wherein the circuitry is to store the metadata in the nonvolatile memory, and wherein said nonvolatile memory comprises one of said flash memory or another memory.

11. The storage device of claim 1 wherein:
the storage device is also to receive incoming data read requests; and
the circuitry is to, in connection with an incoming data read request, receive incoming read address information, identify the addressed block device from the incoming read address information, retrieve a look-up table specific to the addressed block device, and identify the physical storage location dependent on the retrieved look-up table.

12. The storage device of claim 1 wherein:
the circuitry is to track additional metadata for the addressed segment, where said additional metadata indicates an extent to which memory comprising at least one physical erase unit mapped to the addressed segment can continue to receive additional write data without being erased; and
the circuitry is to transmit information to a host dependent on said tracked additional metadata.

13. The storage device of claim 1 wherein the storage device is to store information identifying a number of structures in the flash memory and is to transmit the information identifying the number of structures to a host, wherein the host is to issue at least one request to the storage device in which the at least one request is dependent on the information transmitted to the host identifying the number of structures, and wherein the circuitry is to fulfill the at least one request by issuing commands to the flash memory that each operate on a quantum of flash memory which is dependent on the information transmitted to the host identifying the number of structures.

14. The storage device of claim 13 wherein the information transmitted to the host identifying the number of structures identifies an amount of flash memory that is to be erased as a unit.

15. The storage device of claim 1 wherein:
the metadata comprises specific metadata, the specific metadata being associated with one of the data or the physical page;
the circuitry is to compare the specific metadata to at least one threshold, the at least one threshold representing the at least one criterion; and
responsive to the specific metadata satisfying the at least one threshold, the circuitry is to transmit address information to a host, prior to the copy of the data from the first one of the physical erase units to the second one of the physical erase units.

16. The storage device of claim 15 wherein, responsive to the specific metadata satisfying the at least one threshold, the circuitry is to identify the physical page, and is to identify the address information dependent on performing an inverse of the division operation, in dependence on the physical page and the addressed segment.

17. The storage device of claim 1 wherein the storage device is to receive a query, issued by a host and wherein the circuitry is further to identify from the query the metadata representing the time since data was programmed into the first one of the physical erase units, and transmit information to the host dependent on the identified metadata.

18. The storage device of claim 1 wherein th

Assignees

• Radian Memory Systems Inc

Inventors

• Lercari Robert
• Chen Alan
• Jadon Mike
• Robertson Craig
• Kuzmin Andrey V

Classifications

• G06F2212/7205

  Cleaning, compaction, garbage collection, erase control · CPC title

• G06F3/0662

  Virtualisation aspects · CPC title

• G06F12/0207

  with multidimensional access, e.g. row/column, matrix · CPC title

• G06F12/0246 Primary

  in block erasable memory, e.g. flash memory · CPC title

• G06F3/0616

  in relation to life time, e.g. increasing Mean Time Between Failures [MTBF] · CPC title