Compact ultrasound imaging apparatus

Patent metadata

Field	Value
Publication number	US-11540384-B2
Application number	US-202017014143-A
Country	US
Kind code	B2
Filing date	Sep 8, 2020
Priority date	Apr 15, 2020
Publication date	Dec 27, 2022
Grant date	Dec 27, 2022

Abstract

An apparatus comprises a transceiver (Tx/Rx) printed circuit board (PCB) with a top surface and a bottom surface and a power supply PCB. The Tx/Rx PCB includes two transmitter devices, each comprising a number N of channels. A first transmitter device is arranged on the bottom surface and a second transmitter device is arranged on the top surface over the first transmitter device. One or more pins of the second transmitter device are shorted with one or more pins of the first transmitter device with the same function. An analog front end (AFE) device comprising N input channels is arranged on the top surface of the Tx/Rx PCB, and a digital signal processor is coupled to the AFE device. The power supply PCB comprises a power supply module configured to provide a plurality of supply voltages to the Tx/Rx PCB and the power supply PCB.

First claim

What is claimed is:

1. An apparatus, comprising:
a transceiver (Tx/Rx) printed circuit board (PCB) with a top surface and a bottom surface, comprising:
a first transmitter device arranged on the bottom surface and comprising a number N of channels;
a second transmitter device arranged on the top surface over the first transmitter device and comprising the number N of channels, wherein one or more pins of the second transmitter device are shorted with one or more pins of the first transmitter device with the same function;
an analog front end (AFE) device comprising N input channels;
a digital signal processor (DSP) coupled to the AFE device; and

a power supply PCB comprising a power supply module configured to provide a plurality of supply voltages to the Tx/Rx PCB and the power supply PCB.

2. The apparatus of claim 1 , wherein:
each particular channel of the N channels of the first transmitter device and the N channels of the second transmitter device comprises a unique transmit/receive (T/R) switch, and
the T/R switches are configured to select which of the N channels of the first transmitter device and which of the N channels of the second transmitter device to couple to the N input channels of the AFE device.

3. The apparatus of claim 1 , wherein the DSP is configured to provide clocking signals to the first and second transmitter devices and to the AFE device, and wherein the DSP is further configured to transition the clocking signals to a tri-state mode of operation while the first and second transmitter devices are inactive.

4. The apparatus of claim 1 , wherein the power supply module comprises:
a first section on a top surface of the power supply PCB configured to provide a first power supply to the AFE device and the DSP;
a second section on the top surface of the power supply PCB configured to provide a second power supply to a peripheral controller and an output interface affixed on the top surface of the power supply PCB; and
a third section on a bottom surface of the power supply PCB configured to provide a third power supply to the first and second transmitter devices.

5. The apparatus of claim 4 , wherein the power supply PCB is arranged under the Tx/Rx PCB such that the third section is under the first and second transmitter devices.

6. The apparatus of claim 4 , wherein the third section comprises a filter comprising:
a transistor comprising a control terminal, a first current terminal, and a second current terminal, wherein the first current terminal is configured to receive the third power supply, wherein the second current terminal is configured to provide a filtered, third power supply; and
a low-pass filter having an input configured to receive the third power supply and further having an output coupled to the control terminal.

7. The apparatus of claim 6 , wherein the low-pass filter comprises:
a resistor having a first terminal configured to receive the third power supply and a second terminal coupled to the control terminal; and
a capacitor having a first terminal coupled to the control terminal and the second terminal of the resistor and a second terminal coupled to ground.

8. The apparatus of claim 1 , wherein the Tx/Rx PCB further comprises a set of high-voltage supply capacitors arranged on the top and bottom surfaces of the Tx/Rx PCB, and wherein a second layer of the Tx/Rx PCB comprises a high-voltage supply local plane arranged under the set of high-voltage supply capacitors.

9. The apparatus of claim 8 , further comprising a shield between the Tx/Rx PCB and the power supply PCB configured to reduce electromagnetic interference from the Tx/Rx PCB at the power supply PCB.

10. A method, comprising:
obtaining a first printed circuit board (PCB) with a top surface and a bottom surface;
affixing a first transmitter (Tx) comprising a number N of channels to the bottom surface;
affixing a second Tx comprising the number N of channels to the top surface, wherein the second Tx is aligned on the top surface over the first Tx on the bottom surface;
shorting one or more pins of the first Tx with one or more pins of the second Tx having a same function;
affixing an analog front end (AFE) device comprising a number N of input channels to the top surface;
obtaining a second PCB; and
affixing a power supply module to the second PCB.

11. The method of claim 10 , further comprising mapping the N channels of the first Tx to the N channels of the second Tx, such that a first channel of the first Tx corresponds to a channel of the second Tx at a same position in a top layer and a bottom layer of the first PCB.

12. The method of claim 10 , further comprising affixing a set of high-voltage supply capacitors to the top and bottom surfaces of the first PCB over a high-voltage supply local plane in a second layer of the first PCB.

13. A device with a first printed circuit board (PCB) and a second PCB, comprising:
a first transmitter (Tx) device comprising a number N of channels and arranged on a bottom surface of the first PCB,
a second Tx device comprising the number N of channels and arranged on a top surface of the first PCB over the first Tx device, wherein:
each channel of the 2N channels of the first and second Tx devices comprises a respective receiver, transmitter, transmit/receive (T/R) switch, and output pin,
each output pin of the first Tx device is shorted with a corresponding output pin of the second Tx device,
each particular T/R switch is configured to disconnect the particular receiver from the particular transmitter while the corresponding channel is selected;

an analog front end (AFE) device comprising N input channels and arranged on the top surface of the first PCB, wherein the N input channels are coupled to the N shorted output pins of the first and second Tx devices;
a digital signal processor (DSP) coupled to the AFE device and arranged on the top surface of the first PCB;
a peripheral controller arranged on the second PCB and coupled to the DSP;
an output interface arranged on the second PCB and coupled to the peripheral controller; and
a power supply module configured to provide a plurality of supply voltages to the first and second PCBs.

14. The device of claim 13 , wherein a pin of the second Tx device is shorted with a pin of the first Tx device with the same function.

15. The device of claim 13 , wherein each T/R switch is further configured to disconnect the particular receiver from the particular transmitter during signal transmission.

16. The device of claim 13 , wherein the power supply module comprises:
a first sub-module configured to provide a first supply voltage to the AFE device and the DSP;
a second sub-module configured to provide a second supply voltage to the peripheral controller and the output interface; and
a third sub-module configured to provide a third supply voltage to the first and second Tx devices.

17. The device of claim 16 , wherein the second PCB is arranged under the first PCB such that the third sub-module is under the first and second Tx devices.

18. The device of claim 16 , wherein the third sub-module comprises a filter, wherein the filter comprises:
a transistor comprising:
a control terminal,
a first current terminal configured to receive the third supply voltage, and
a second current terminal configured to provide a filtered, third supply voltage; and

a low-pass filter having an input configured to receive the third supply voltage and further having an output coupled to the control terminal.

19. The devic

Assignees

• Texas Instruments Inc

Inventors

• Amjhera Wala Shabbir
• Xu Xiaochen
• K Dijeesh
• Vishwa Abhishek
• Devi Shriram
• Chandak Aatish
• Dixit Sanjay
• Granata Elisa Maddalena
• Shen Jun
• Oswal Sandeep

Classifications

• H05K1/0243 Primary

  Printed circuits associated with mounted high frequency components · CPC title

• H04B1/40 Primary

  Circuits · CPC title

• H05K1/0216

  Reduction of cross-talk, noise or electromagnetic interference (grounding H05K1/0215) · CPC title

• H05K1/144

  Stacked arrangements of planar printed circuit boards · CPC title

• H05K2201/10371

  Shields or metal cases · CPC title