System and method for direct signal down-conversion and decimation

Patent metadata

Field	Value
Publication number	US-11539375-B2
Application number	US-202117459655-A
Country	US
Kind code	B2
Filing date	Aug 27, 2021
Priority date	Oct 21, 2020
Publication date	Dec 27, 2022
Grant date	Dec 27, 2022

Abstract

Systems and methods for direct signal down-conversion and decimation in a digital receiver. The digital receiver produces a decimated passband version of the signal without the problems associated with use of digital mixers. The digital receiver includes a passband-to-passband decimator/down-converter that implements an algorithm which takes the signal band (frequency and bandwidth or lower and upper frequencies) where a signal is present and produces a decimation rate and phase for use by a low-pass mixer-free down-conversion. The digital receiver technology may be efficiently implemented on a digital signal processor or field-programmable gate array.

First claim

The invention claimed is:

1. A method for decimating and down-converting passband signals comprising:
(a) transducing electromagnetic radiation carrying a repetitive signal into an analog electrical passband signal;
(b) converting the analog electrical passband signal into passband signal samples at a sampling rate;
(c) estimating a center frequency and a bandwidth of the passband signal;
(d) calculating a decimation ratio and a channel index based on estimated center frequency and estimated bandwidth; and
(e) decimating and down-converting the passband signal samples to a sample rate which is less than the sampling rate based on the decimation ratio and channel index.

2. The method as recited in claim 1 , wherein step (d) is an algorithm comprising:
defining boundaries of a frequency interval [f lo , f hi ] based on estimated center frequency and estimated bandwidth;
setting a value of a parameter m equal to floor(1/b), where b is the estimated bandwidth;
computing m hi =└mf hi ┘ using a floor function;
computing v hi =└m hi /f hi ┘ using the floor function;
computing m lo =└mf lo ┘ using the floor function;
computing v lo =└m lo /f lo ┘ using a ceiling function;
computing a decimation ratio L=max(v lo , v hi ); and
computing a channel index k =└Lf lo ┘.

3. The method as recited in claim 2 , wherein the algorithm further comprises determining whether conditions k/L>f lo or (k+1)/L<f hi and m lo and m hi >0 are met or not.

4. The method as recited in claim 3 , wherein the algorithm further comprises refining the decimation ratio L and the channel index k in response to a determination that k/L>f lo or (k+1)/L<f hi and m lo and m hi >0.

5. The method as recited in claim 3 , wherein the algorithm further comprises outputting the decimation ratio L and the channel index k in response to a determination that the conditions are not met.

6. The method as recited in claim 1 , wherein step (e) comprises:
inputting the passband signal samples into a plurality of decimators at successive times, the number of decimators in the plurality of decimators being equal to the decimation ratio; and
decimating the passband signal samples to the sample rate by means of the plurality of decimators.

7. The method as recited in claim 6 , wherein step (e) further comprises filtering the decimated passband signal samples by means of a plurality of sub-filters respectively connected to the plurality of decimators.

8. The method as recited in claim 7 , wherein step (e) further comprises multiplying some of the filtered passband signal samples by respective weights which change over time as a function of the index channel.

9. The method as recited in claim 8 , wherein step (e) further comprises summing results of the decimating, filtering, and multiplying operations and then outputting the passband signal samples having the sample rate.

10. The method as recited in claim 9 , further comprising: processing the passband signal samples having the sample rate to generate pulse descriptor words comprising respective data sets of parameter values of the repetitive signal, wherein each data set of parameter values making up a pulse descriptor word comprises amplitude, time of arrival, and frequency.

11. The method as recited in claim 10 , further comprising identifying a source of the repetitive signal based on the data sets of parameter values.

12. The method as recited in claim 10 , further comprising directing movement of a vehicle based on the data sets of parameter values.

13. Passband-to-passband decimation/down-conversion circuitry comprising:
circuitry for performing an algorithm that converts an estimated signal center frequency f C and an estimated signal bandwidth b to a decimation ratio L and a channel index k; and
a polyphase decimator/down-converter which is connected to receive the decimation ratio L and channel index k and configured to decimate the passband samples having a sample rate f S by a factor of L and then down-convert an original passband frequency to a lower passband frequency.

14. The circuitry as recited in claim 13 , wherein the polyphase decimator/down-converter comprises:
a plurality of decimators connected to receive passband signal samples: and
a plurality of down-converters connected to receive decimated passband signal samples from the plurality of decimators respectively.

15. The circuitry as recited in claim 14 , wherein each down-converter of the plurality of down-converters comprises a respective bandpass filter followed by a respective multiplier.

16. The circuitry as recited in claim 14 , wherein the algorithm comprises:
defining boundaries of a frequency interval [f lo , f hi ] based on the estimated center frequency and estimated bandwidth;
setting a value of a parameter m equal to floor(1/b), where b is the estimated bandwidth;
computing m hi =└mf hi ┘ using a floor function;
computing v hi =└m hi /f hi ┘ using the floor function;
computing m lo =└mf lo ┘ using the floor function;
computing v lo =└m lo /f lo ┘ using a ceiling function;
computing the decimation ratio L=max(v lo , v hi ); and
computing the channel index k =└Lf lo ┘.

17. The circuitry as recited in claim 16 , wherein the algorithm further comprises determining whether conditions k/L>f lo or (k+1)/L<f hi and m lo and m hi >0 are met or not.

18. The circuitry as recited in claim 17 , wherein the algorithm further comprises refining the decimation ratio L and the channel index k in response to a determination that k/L>f lo or (k+1)/L<f hi and m lo and m hi >0.

19. The circuitry as recited in claim 17 , wherein the algorithm further comprises outputting the decimation ratio L and the channel index k in response to a determination that the conditions are not met.

20. A signal processing system comprising:
a sensor configured to transduce electromagnetic radiation carrying a repetitive signal into an analog electrical signal;
an analog-to-digital converter configured to convert the analog electrical signal into signal samples;
a cueing system connected to receive the signal samples and configured to process the signal samples to generate digital data representing an estimated signal center frequency f C and an estimated bandwidth b; and
a plurality of signal separation and tracking channel comprising:
circuitry for performing an algorithm that converts estimated signal center frequency f C and estimated signal bandwidth b to a decimation ratio L and a channel index k; and
a polyphase decimator/down-converter which is connected to receive decimation ratio L and channel index k and configured to decimate the passband samples having a sample rate f S by a factor of L and then down-convert an original passband frequency to a lower passband frequency.

Assignees

• Boeing Co

Inventors

• Ray Gary A

Classifications

• H03H17/0275 Primary

  comprising non-recursive filters · CPC title

• H03H17/0621

  with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing · CPC title

• H03M3/462 Primary

  Details relating to the decimation process (decimation filters in general H03H17/0416, H03H17/0621) · CPC title

• H03H2017/0247

  Parallel structures using a slower clock · CPC title

• H03H17/0211

  using specific transformation algorithms, e.g. WALSH functions, Fermat transforms, Mersenne transforms, polynomial transforms, Hilbert transforms (correlation computation G06F17/156) · CPC title