Fast switching and ultra-low power compact varactor driver
US-2024356509-A1 · Oct 24, 2024 · US
US11539308B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11539308-B2 |
| Application number | US-201916400821-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 1, 2019 |
| Priority date | May 1, 2019 |
| Publication date | Dec 27, 2022 |
| Grant date | Dec 27, 2022 |
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A virtual resistive load feedback circuit for driving a piezoelectric actuator is provided that accounts for a hysteresis error and drift within the movement of the actuator. The circuit may include a voltage divider and charge divider. A voltage monitor signal corresponding to a voltage of a driver signal and a current monitor signal corresponding to a current provided to the amplifier are combined by an operational amplifier and include electrical characteristics of the actuator such that the circuit approximates a virtual load across the actuator. A feedback portion of the operational amplifier may include a resistor and capacitor connected in parallel to provide the voltage and charge divide functions. The use of the virtual resistive circuit allows for the piezoelectric actuator to be ground referenced, with no external components connected directly to the actuator while gaining the feedback effect to counter the hysteresis and drifts errors of the actuator.
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What is claimed is: 1. A piezoelectric power amplifier comprising: an amplifier comprising a first input and a second input, the first input receiving a control input signal and the amplifier transmitting, based on the control input signal, a power driving signal to a piezoelectric actuator device; and a hysteresis compensation circuit comprising: a summing circuit comprising a first input receiving a voltage monitor signal comprising a first voltage value corresponding to a voltage of the power driving signal and a current monitor signal comprising a second voltage value corresponding to a current of the power driving signal, the output comprising the sum of the voltage monitor signal and the current monitor signal; and a dividing circuit, coupled between the output of the summing circuit and the first input of the summing circuit, wherein the output of the summing circuit is coupled to the second input of the amplifier for hysteresis compensation of the piezoelectric actuator device based at least on the voltage monitor output signal and the current monitor output signal. 2. The piezoelectric power amplifier of claim 1 , wherein the summing circuit comprises: an operational amplifier comprising the first input, a second input, and the output, the second input of the operational amplifier coupled to common and the output of the operational amplifier coupled to an input of an inverter device, an output of the inverter device coupled to the second input of the amplifier. 3. The piezoelectric power amplifier of claim 1 , wherein the dividing circuit comprises: a first resistor connected in parallel with a capacitor. 4. The piezoelectric power amplifier of claim 3 , wherein the dividing circuit divides a current of the power driving signal based at least on the capacitor and an electrical capacitance of the piezoelectric actuator device. 5. The piezoelectric power amplifier of claim 3 , wherein the hysteresis compensation circuit further comprises: a first tunable resistor coupled in series between the voltage monitor output signal and the first input of the summing circuit; and a second tunable resistor coupled in series between the current monitor output signal and the first input of the summing circuit. 6. The piezoelectric power amplifier of claim 5 , wherein the first tunable resistor and the second tunable resistor generate a virtual resistance across the piezoelectric actuator device, the hysteresis compensation circuit further comprising: a voltage divider circuit dividing the voltage of the power driving signal based on the virtual resistor and the first resistor. 7. The piezoelectric power amplifier of claim 5 , further comprising: a computing device coupled to the first tunable resistor and the second tunable resistor, the computing device to control a resistive value of the first tunable resistor and the second tunable resistor. 8. The piezoelectric power amplifier of claim 7 , wherein the control of the resistive value of the first tunable resistor and the second tunable resistor is based on a ratio of a resistive value of the virtual resistor to a capacitance value of an electrical capacitance of the piezoelectric actuator device. 9. A system for hysteresis compensation of a piezoelectric actuator, the system comprising: an operational amplifier comprising: a first input receiving a voltage monitor signal of a power amplifier and a current monitor signal of the power amplifier, the power amplifier receiving a control input signal and providing a power driving signal to a load, the voltage monitor signal comprising a first voltage value corresponding to a voltage of the power driving signal and the current monitor signal comprising a second voltage value corresponding to a current of the power driving signal; a second input coupled to a common value; and an output coupled to a feedback input of the power amplifier, the output comprising a summation of the voltage monitor signal and the current monitor signal; and a feedback circuit, coupled between the output of the operational amplifier and the first input, comprising a first resistor connected in parallel with a capacitor, the feedback circuit dividing the voltage and the current of the power driving signal. 10. The system of claim 9 , further comprising: a first tunable resistor coupled in series between the voltage monitor output signal and the first input of the operational amplifier; and a second tunable resistor coupled in series between the current monitor output signal and the first input of the operational amplifier. 11. The system of claim 10 , further comprising: a computing device coupled to the first tunable resistor and the second tunable resistor, the computing device to control a resistive value of the first tunable resistor and the second tunable resistor. 12. The system of claim 10 , wherein the first tunable resistor and the second tunable resistor generate a virtual resistance across the load such that a voltage of the output of the operational amplifier is based on the voltage of the power driving signal multiplied by a ratio of a resistance value of the virtual resistor and a resistance value of the first resistor. 13. The system of claim 9 , wherein the current of the output of the operational amplifier is the current of the power driving signal multiplied by a divide ratio based on an equivalent capacitance of the load and the capacitor of the feedback circuit.
the feedback circuit of the amplifier stage comprising a passive resistor and passive capacitor · CPC title
the LC comprising one or more resistors coupled to the LC by feedback (active or passive) · CPC title
using IC blocks as the active amplifying circuit · CPC title
the FBC comprising a resistor-capacitor combination and being coupled between the LC and the IC · CPC title
Large signal circuits, e.g. final stages · CPC title
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