Light receiving element and ranging module having light receiving regions and an isolation portion between adjacent light receiving regions

Patent metadata

Field	Value
Publication number	US-11538942-B2
Application number	US-201916633710-A
Country	US
Kind code	B2
Filing date	Jul 4, 2019
Priority date	Jul 18, 2018
Publication date	Dec 27, 2022
Grant date	Dec 27, 2022

Abstract

The present technology relates to a light receiving element and a ranging module that can improve characteristics. A light receiving element includes: light receiving regions each including a first voltage application unit to which a first voltage is applied, a first charge detection unit provided around the first voltage application unit, a second voltage application unit to which a second voltage different from the first voltage is applied, and a second charge detection unit provided around the second voltage application unit; and an isolation portion that is arranged at a boundary between the light receiving regions adjacent to each other, and isolates the light receiving regions from each other. The present technology can be applied to a light receiving element.

First claim

What is claimed is:

1. A light receiving element, comprising:
light receiving regions, each including;
a first voltage application unit to which a first voltage is applied;
a first charge detection unit provided around the first voltage application unit;
a second voltage application unit to which a second voltage different from the first voltage is applied; and
a second charge detection unit provided around the second voltage application unit; and

an isolation portion that is arranged at a boundary between the light receiving regions adjacent to each other, wherein the isolation portion isolates the light receiving regions from each other.

2. The light receiving element according to claim 1 , further comprising:
an on-chip lens;
a wiring layer; and
a semiconductor layer arranged between the on-chip lens and the wiring layer, wherein
each of the light receiving regions and the isolation portion are formed in the semiconductor layer.

3. The light receiving element according to claim 2 , wherein
the wiring layer includes at least one layer including a reflecting member, and
the reflecting member is provided so as to overlap the first charge detection unit or the second charge detection unit when viewed in plan.

4. The light receiving element according to claim 2 , wherein
the wiring layer includes at least one layer including a light-shielding member, and
the light-shielding member is provided so as to overlap the first charge detection unit or the second charge detection unit when viewed in plan.

5. The light receiving element according to claim 2 , further comprising
a transistor region provided with a transistor connected to the first charge detection unit and a transistor connected to the second charge detection unit.

6. The light receiving element according to claim 5 , wherein
the isolation portion is provided in a region different from the transistor region when viewed in plan.

7. The light receiving element according to claim 5 , wherein
isolation portions are provided at positions at two ends of the transistor region.

8. The light receiving element according to claim 1 , wherein
each of the light receiving regions is surrounded by the isolation portion when viewed in plan.

9. The light receiving element according to claim 2 , wherein
the on-chip lens is arranged such that an optical axis position of the on-chip lens coincides with approximately a center position of a region surrounded by the isolation portion.

10. The light receiving element according to claim 2 , wherein
the on-chip lens is arranged such that an optical axis position of the on-chip lens coincides with approximately a middle position between the first charge detection unit and the second charge detection unit.

11. The light receiving element according to claim 1 , wherein
each of the light receiving regions is formed with a plurality of the first voltage application unit and the first charge detection unit, and the second voltage application unit and the second charge detection unit.

12. The light receiving element according to claim 2 , wherein
the isolation portion is formed so as to pass through the semiconductor layer.

13. The light receiving element according to claim 2 , wherein
the isolation portion is formed from a surface of the semiconductor layer on a side of the wiring layer to a predetermined depth.

14. The light receiving element according to claim 2 , wherein
the isolation portion is formed from a surface of the semiconductor layer on a side of the on-chip lens to a predetermined depth.

15. The light receiving element according to claim 14 , wherein
an oxide film is formed between a surface of the semiconductor layer on a side of the wiring layer and the isolation portion.

16. The light receiving element according to claim 1 , wherein
the isolation portion includes at least an oxide film.

17. The light receiving element according to claim 1 , wherein
the isolation portion includes at least a fixed charge film.

18. The light receiving element according to claim 1 , wherein
the isolation portion includes at least a metal material.

19. The light receiving element according to claim 1 , wherein
the isolation portion includes at least an N-type semiconductor region or a P-type semiconductor region.

20. The light receiving element according to claim 2 , wherein
the semiconductor layer is a P-type semiconductor layer, and
the isolation portion includes at least an N-type semiconductor region, and a voltage equal to or higher than a voltage applied to the semiconductor layer is applied to the N-type semiconductor region.

21. The light receiving element according to claim 1 , wherein
no oxide film is formed in the light receiving regions.

22. The light receiving element according to claim 2 , wherein
the first voltage application unit and the second voltage application unit include a first P-type semiconductor region and a second P-type semiconductor region formed in the semiconductor layer, respectively.

23. The light receiving element according to claim 2 , wherein
the first voltage application unit and the second voltage application unit include a first transfer transistor and a second transfer transistor formed in the semiconductor layer, respectively.

24. A ranging module, comprising:
a light receiving element;
a light source that radiates irradiation light whose brightness varies periodically; and
a light emission control part that controls an irradiation timing of the irradiation light, wherein
the light receiving element includes:
light receiving regions each including:
a first voltage application unit to which a first voltage is applied;
a first charge detection unit provided around the first voltage application unit;
a second voltage application unit to which a second voltage different from the first voltage is applied; and
a second charge detection unit provided around the second voltage application unit; and
an isolation portion that is arranged at a boundary between the light receiving regions adjacent to each other, and wherein the isolation portion isolates the light receiving regions from each other.

Assignees

• Sony Semiconductor Solutions Corp

Inventors

• NEYA Koji
• Maruyama Takuya

Classifications

• G01S17/08

  for measuring distance only (indirect measurement G01S17/46; active triangulation systems G01S17/48) · CPC title

• G01S7/4913

  Circuits for detection, sampling, integration or read-out · CPC title

• G01S7/487

  Extracting wanted echo signals {, e.g. pulse detection} · CPC title

• G01S7/4863

  Detector arrays, e.g. charge-transfer gates · CPC title

• H01L31/02019 Primary

  Electricity · mapped topic