Multilayer board and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-11523521-B2
Application number	US-201916257148-A
Country	US
Kind code	B2
Filing date	Jan 25, 2019
Priority date	Aug 18, 2016
Publication date	Dec 6, 2022
Grant date	Dec 6, 2022

Abstract

A method of manufacturing a multilayer board includes forming conductor patterns on four or more insulating base material layers, forming a multilayer body by stacking the insulating base material layers in a state in which the conductor patterns face each other with prepreg layers therebetween, and heat-pressing the multilayer body. In a state before the step of heat-pressing, among the prepreg layers, a thickness of an outermost prepreg layer is larger than a thickness of a prepreg layer other than the outermost prepreg layer.

First claim

What is claimed is:

1. A multilayer board comprising:
four or more insulating base material layers;
conductor patterns provided on the insulating base material layers; and
a plurality of prepreg layers that join the insulating base material layers to each other; wherein
the conductor patterns are provided on surfaces of the insulating base material layers that contact both surfaces of an outermost prepreg layer among the plurality of prepreg layers;
among the plurality of prepreg layers, a thickness of the outermost prepreg layer is larger than a thickness of an inner prepreg layer other than the outermost prepreg layer;
the conductor patterns that contact both surfaces of the outermost prepreg layer face each other with the outermost prepreg layer therebetween;
the conductor patterns that contact both surfaces of the inner prepreg layer face each other with the inner prepreg layer therebetween; and
the conductor patterns that face each other with the outermost prepreg layer therebetween and the conductor patterns that face each other with the inner prepreg layer therebetween include portions that overlap at a same or substantially same position as viewed in a stacking direction of the insulating base material layers and the prepreg layers.

2. The multilayer board according to claim 1 , wherein the conductor patterns that contact the prepreg layers define a coil that has a coil axis in the stacking direction of the insulating base material layers and the prepreg layers.

3. The multilayer board according to claim 1 , wherein a relative dielectric constant of the prepreg layers is smaller than a relative dielectric constant of the insulating base material layers.

4. The multilayer board according to claim 3 , wherein
the relative dielectric constant of the prepreg layers is about 2.0 or higher and about 2.5 or lower; and
the relative dielectric constant of the insulating base material layers is about 3.0 or higher and about 4.0 or lower.

5. The multilayer board according to claim 1 , wherein the prepreg layers are made of a thermosetting adhesive including fluororesin.

6. The multilayer board according to claim 1 , wherein the conductor patterns are made of Cu foil.

Assignees

• Murata Manufacturing Co

Inventors

• Ito Shingo
• Iida Kanto
• Gouchi Naoki

Classifications

• H05K3/462

  characterized by laminating only or mainly similar double-sided circuit boards · CPC title

• H05K2201/0195

  Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure · CPC title

• H05K1/0373

  containing additives, e.g. fillers (H05K1/036 takes precedence) · CPC title

• H05K3/46

  Manufacturing multilayer circuits · CPC title

• C08J5/24 Primary

  Impregnating materials with prepolymers which can be polymerised in situ, e.g. manufacture of prepregs · CPC title