Forwarding element with physical and virtual data planes

Patent metadata

Field	Value
Publication number	US-11522764-B2
Application number	US-201916568330-A
Country	US
Kind code	B2
Filing date	Sep 12, 2019
Priority date	Aug 26, 2019
Publication date	Dec 6, 2022
Grant date	Dec 6, 2022

Abstract

Some embodiments of the invention provide a novel method of performing network slice-based operations on a data message at a hardware forwarding element (HFE) in a network. For a received data message flow, the method has the HFE identify a network slice associated with the received data message flow. This network slice in some embodiments is associated with a set of operations to be performed on the data message by several network elements, including one or more machines executing on one or more computers in the network. Once the network slice is identified, the method has the HFE process the data message flow based on a rule that applies to data messages associated with the identified slice.

First claim

The invention claimed is:

1. A hardware forwarding element (HFE) for operating in a network, the HFE comprising:
an application specific integrated circuit comprising a plurality of message processing stages and a set of ports, and implementing a data plane forwarding circuit to perform a first set of data plane forwarding operations on a first set of data messages and to forward the first set of data messages through the set of ports;
a network interface controller (NIC); and
a microprocessor and a memory storing a program for execution by the microprocessor to perform a second set of data plane forwarding operations on a second set of data messages that are then forwarded through the NIC, wherein both the first and second sets of data plane forwarding operations comprise next-hop forwarding operations on the data messages received by the HFE to identify next-hop network elements in the network for the data messages.

2. The hardware forwarding element of claim 1 , wherein the program receives, from the data plane forwarding circuit, a particular data message to be processed by the program when the data plane forwarding circuit cannot identify the next hop for the particular data message.

3. The hardware forwarding element of claim 1 , wherein the first and second sets of data plane forwarding operations comprise layer 2 forwarding operations performed on data messages received by the hardware forwarding element.

4. The hardware forwarding element of claim 1 , wherein the second set of data plane forwarding operations comprises a set of one or more service operations to perform on a third set of data messages received by the data plane forwarding circuit.

5. The hardware forwarding element of claim 4 , wherein the third set of data messages is associated with a network slice and the set of service operations are part of a service chain of operations performed on data messages associated with the network slice.

6. The hardware forwarding element of claim 1 , wherein the second set of data plane forwarding operations comprises a slice identifier (ID) specifying operations to generate a slice ID associated with each of a plurality of data message flows received by the data plane forwarding circuit, and to provide the slice IDs to the data plane forwarding circuit to perform slice-based forwarding operations based on the provided slice IDs.

7. The hardware forwarding element of claim 1 , wherein the data plane forwarding circuit is a physical first data plane of the hardware forwarding element, while the program for execution by the microprocessor implements a virtual second data plane.

8. The hardware forwarding element of claim 1 , wherein the program is a Linux operating system with which at least one container is defined to perform the second set of data plane forwarding operations.

9. The hardware forwarding element of claim 1 , wherein the program is a container machine.

10. The hardware forwarding element of claim 1 , wherein the program is a virtual machine executing over a hypervisor executed by the set of processing units.

11. The hardware forwarding element of claim 1 , wherein the program is a hypervisor comprising at least one module that performs at least a subset of the second set of data plane forwarding operations.

Assignees

• Vmware Inc

Inventors

• Kommula Raja
• Polychronopoulos Constantine
• Sridhar Thayumanavan
• Bordeleau Marc-Andre
• Choh Edward
• Gupta Ojas
• Kidd Robert
• Oikonomou Georgios
• Tidemann Jeremy

Classifications

• H04L41/082

  the condition being updates or upgrades of network functionality · CPC title

• H04L45/64

  using an overlay routing layer · CPC title

• G06F2009/4557

  Distribution of virtual machine instances; Migration and load balancing · CPC title

• H04L49/9068

  in the network interface card · CPC title

• H04L41/0895

  Configuration of virtualised networks or elements, e.g. virtualised network function or OpenFlow elements · CPC title