DC coupled amplifier having pre-driver and bias control

Patent metadata

Field	Value
Publication number	US-11515841-B2
Application number	US-202016888294-A
Country	US
Kind code	B2
Filing date	May 29, 2020
Priority date	May 31, 2019
Publication date	Nov 29, 2022
Grant date	Nov 29, 2022

Abstract

A dc coupled amplifier includes a pre-driver, and amplifier and a bias control circuit. The pre-driver is configured to receive one or more input signals and amplify the one or more input signals to create one or more pre-amplified signals. The amplifier has cascode configured transistors configured to receive and amplify the one or more pre-amplified signals to create one or more amplified signals, the amplifier further having an output driver termination element. The bias control circuit is connected between the pre-driver and the amplifier, the bias control circuit receiving at least one bias current from the output driver termination element of the amplifier, wherein the pre-driver, the amplifier and the bias control circuit are all formed on a same die.

First claim

What is claimed is:

1. An amplifier system, comprising:
a pre-driver configured to receive one or more input signals and amplify the one or more input signals, based on a gain control signal, to create one or more pre-amplified signals;
a gain control circuit configured to control gain of the pre-driver based on the gain control signal that is provided to the pre-driver;
an amplifier configured to receive and amplify the one or more pre-amplifier input signals to create one or more amplified signals, the amplifier further having an output driver termination element; and
a bias control circuit connected between the pre-driver and the amplifier, the bias control circuit receiving at least one bias control circuit input current from the output driver termination element of the amplifier, wherein the pre-driver, bias control circuit, and the amplifier are formed on a same die.

2. The amplifier system of claim 1 wherein the bias control circuit includes one or more transistors configured as level shifters that control a voltage provided the pre-driver.

3. The amplifier system of claim 1 wherein the die is a gallium arsenide die.

4. The amplifier system of claim 1 wherein the bias control circuit includes one or more transistors configured to ensure that a pre-driver bias current is insensitive to process variation and bias voltage variation.

5. The amplifier system of claim 1 wherein the pre-driver includes one or more amplifier sections, each of which receive a bias signal from the bias control circuit.

6. The amplifier system of claim 5 wherein each amplifier section is formed from two transistors in a common source configuration.

7. The amplifier system of claim 1 wherein the amplifier is a DC coupled amplifier having cascode connected transistors.

8. A method for amplifying signal with an amplifier comprising:
providing a pre-driver, an amplifier and a bias control circuit on the same die;
providing one or more input signals to the pre-driver;
amplify the one or more input signals with the pre-driver, based on a gain control signal, to create one or more pre-amplified signals;
providing a gain control circuit;
generating the gain control signal at the gain control circuit to thereby control the gain of the pre-driver;
providing one or more pre-amplified signals to the amplifier;
amplifying the one or more amplifier input signals to create one or more amplified signals and one or more bias control circuit input currents,
providing the bias control circuit with the one or more bias control circuit input currents; and
generating the one or more bias control signals with the bias control circuit.

9. The method of claim 8 wherein the bias control circuit includes one or more transistors configured as level shifters that control a voltage provided the pre-driver.

10. The method of claim 8 wherein the die is a gallium arsenide die.

11. The method of claim 8 wherein the pre-driver includes one or more amplifier sections, each of which receive a bias signal from the bias control circuit.

12. The method of claim 11 wherein each amplifier section is formed from two transistors in a common source configuration.

13. The method of claim 8 wherein the amplifier further comprises an output driver termination element and the bias control circuit receives the one or more bias control circuit input currents from the output driver termination element of the amplifier.

14. An amplifier system, comprising:
a pre-driver configured to receive one or more input signals and pre-amplify the one or more input signals to create one or more pre-amplified signals;
a gain control system configured as part of the pre-driver; the gain control system controlling the pre-driver gain in response to a gain control signal provided to the gain control system;
an amplifier configured to receive and amplify the one or more pre-amplified signals to create one or more amplified signals; and
a bias control circuit connected between the pre-driver and the amplifier, the bias control circuit receiving at least one bias control circuit input current from the amplifier, wherein the pre-driver, the gain control circuit, the bias control circuit, and the amplifier are formed on one die.

15. The amplifier system of claim 14 wherein the bias control circuit includes one or more transistors configured as level shifters that control a voltage provided the pre-driver.

16. The amplifier system of claim 14 wherein the bias control circuit includes one or more transistors configured to ensure that a pre-driver bias current is insensitive to process variation and bias voltage variation.

17. The amplifier system of claim 14 wherein the pre-driver includes three amplification sections, each of which receive a bias signal from the bias control circuit.

18. The amplifier system of claim 17 wherein each amplifier section is formed from two transistors in a common source configuration.

Assignees

• Macom Tech Solutions Holdings Inc

Inventors

• Kennan Wayne
• Nguyen Baotoan

Classifications

• H03F3/45197

  Pl types (H03F3/45224, H03F3/45251 take precedence) · CPC title

• H03F3/607

  using FET's · CPC title

• H03F1/223 Primary

  with MOSFET's · CPC title

• H03F2200/18

  the bias of the gate of a FET being controlled by a control signal · CPC title

• H03F3/45085

  Long tailed pairs (H03F3/45112, H03F3/45139 take precedence) · CPC title