Transmission line structures for millimeter wave signals

Patent metadata

Field	Value
Publication number	US-11515609-B2
Application number	US-201916577359-A
Country	US
Kind code	B2
Filing date	Sep 20, 2019
Priority date	Mar 14, 2019
Publication date	Nov 29, 2022
Grant date	Nov 29, 2022

Abstract

A coplanar waveguide structure includes a dielectric layer disposed over at least a portion of a substrate and a planar transmission line disposed within the dielectric layer. In some instances, the planar transmission line can include a conductive signal line and one or more ground lines. In other instances, the planar transmission line may include a conductive stacked signal line and one or more stacked ground lines.

First claim

What is claimed is:

1. A coplanar waveguide structure, comprising:
a high resistivity substrate;
a dielectric layer disposed over at least a portion of the high resistivity substrate; and
a planar transmission line disposed within the dielectric layer, the planar transmission line comprising:
a conductive stacked signal line;
a first stacked ground line positioned on a first side of the conductive stacked signal line and separated from the conductive stacked signal line by a first distance; and
a second stacked ground line positioned on a second side of the conductive stacked signal line and separated from the conductive stacked signal line by a second distance,
wherein:
the conductive stacked signal line, the first stacked ground line, and the second stacked ground line each comprises a plurality of conductive segments in a plurality of conductive layers stacked vertically and electrically connected to one another with vias in via layers;
the conductive layers include conductive layers C 1 through C N and the via layers include via layers V 1 through V M , where N is a number greater than one, M is a number equal to or greater than one, and M is less than N
a first bottom conductive segment of the conductive stacked signal line, a second bottom conductive segment of the first stacked ground line, and a third bottom conductive segment of the second stacked ground line are formed in the first conductive layer C 1 that is directly on a top surface of the high resistivity substrate;
a first top conductive segment of the conductive stacked signal line, a second top conductive segment of the first stacked ground line, and a third top conductive segment of the second stacked ground line are formed in the Nth conductive layer CN that is immediately below a top conductive layer
the top conductive layer is an ultra-thick metal layer having a thickness of one to fifty micrometers and is not used for the conductive stacked signal line, the first stacked ground line, and the second stacked ground line; and
a first width of the conductive stacked signal line, a second width of the first stacked ground line, and a third width of the second stacked ground line are based at least in part on a number of conductive layers formed underneath the ultra-thick metal layer.

2. The coplanar waveguide structure of claim 1 , wherein the high resistivity substrate comprises a high resistivity silicon substrate.

3. The coplanar waveguide structure of claim 1 , wherein the first width of the conductive stacked signal line substantially equals the second and third widths of the first and the second stacked ground lines.

4. The coplanar waveguide structure of claim 1 , wherein the plurality of conductive segments in the conductive stacked signal line and in the first and the second stacked ground lines are interlaced with vias.

5. The coplanar waveguide structure of claim 1 , wherein the first distance substantially equals the second distance.

6. The coplanar waveguide structure of claim 1 , wherein the plurality of conductive segments in the conductive stacked signal line and in the first and the second stacked ground lines are formed of copper, silver, or aluminum.

7. The coplanar waveguide structure of claim 1 , wherein the coplanar waveguide structure is operable to transmit or receive at least millimeter wave signals.

8. The coplanar waveguide structure of claim 1 , wherein the first width of the conductive stacked signal line is different than the second and third widths of the first and the second stacked ground lines.

9. The coplanar waveguide structure of claim 1 , wherein the first distance is different than the second distance.

10. An integrated circuit, comprising:
circuitry comprising one or more circuits; and
a coplanar waveguide structure operably connected to the circuitry, the coplanar waveguide structure comprising:
a high resistivity substrate;
a dielectric layer disposed over at least a portion of the high resistivity substrate; and
a planar transmission line disposed within the dielectric layer, wherein the planar transmission line comprises:
a conductive stacked signal line;
a first stacked ground line positioned on a first side of the conductive stacked signal line and separated from the conductive stacked signal line by a first distance; and
a second stacked ground line positioned on a second side of the conductive stacked signal line and separated from the conductive stacked signal line by a second distance,
wherein:
the first distance differs from the second distance;
the conductive stacked signal line, the first stacked ground line, and the second stacked ground line each comprises a plurality of conductive segments in a plurality of conductive layers stacked vertically and electrically connected to one another with vias in via layers;
the conductive layers include conductive layers C 1 through C N and the via layers include via layers V 1 through V M , where N is a number greater than one, M is a number equal to or greater than one, and M is less than N
a first bottom conductive segment of the conductive stacked signal line, a second bottom conductive segment of the first stacked ground line, and a third bottom conductive segment of the second stacked ground line are formed in the first conductive layer C 1 that is directly on a top surface of the high resistivity substrate;
a first top conductive segment of the conductive stacked signal line, a second top conductive segment of the first stacked ground line, and a third top conductive segment of the second stacked ground line are formed in the Nth conductive layer CN that is immediately below a top conductive layer
the top conductive layer is an ultra-thick metal layer and is not used for the conductive stacked signal line, the first stacked ground line, and the second stacked ground line; and
a first width of the conductive stacked signal line, a second width of the first stacked ground line, and a third width of the second stacked ground line are based at least in part on a number of conductive layers formed underneath the ultra-thick metal layer.

11. The integrated circuit of claim 10 , wherein the integrated circuit comprises a monolithic microwave integrated circuit.

12. The integrated circuit of claim 10 , wherein the first width of the conductive stacked signal line substantially equals the second and the third widths of the first and the second stacked ground lines.

13. The integrated circuit of claim 10 , wherein the plurality of conductive segments in the conductive stacked signal line and in the first and the second stacked ground lines are interlaced with vias.

14. The integrated circuit of claim 10 , wherein the plurality of conductive segments in the conductive stacked signal line and in the first and the second stacked ground lines are formed of copper, silver, or aluminum.

15. The integrated circuit of claim 10 , wherein the integrated circuit comprises a microwave integrated circuit.

16. The integrated circuit of claim 10 , wherein the first width of the conductive stacked signal line, the second width of the first stacked ground line, and the third width of the second stacked ground line are further based at least in part on which conductive layers in the integrated circuit form the conductive stacked signal line and the first and the second stacked ground lines.

17. The integrated circuit of claim 10 , wherein the ultra-thick metal layer has a thickness of one to fifty micrometers.

18. The integrated circuit of claim 10 , wherein the first width of

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Jin Jun-De

Classifications

• H10W44/251

  for monolithic microwave integrated circuits [MMIC] · CPC title

• H10W44/216

  Waveguides, e.g. strip lines · CPC title

• H10W44/20

  at high-frequency [HF] or radio frequency [RF] · CPC title

• H01P11/003

  Manufacturing lines with conductors on a substrate, e.g. strip lines, slot lines · CPC title

• H01P3/003 Primary

  Coplanar lines · CPC title