Array substrate and display device

Patent metadata

Field	Value
Publication number	US-11513407-B2
Application number	US-201916492294-A
Country	US
Kind code	B2
Filing date	Jan 21, 2019
Priority date	Jun 4, 2018
Publication date	Nov 29, 2022
Grant date	Nov 29, 2022

Abstract

An array substrate and a display device are provided, and the array substrate includes a base substrate and includes a pixel array and an auxiliary conductive structure which are on the base substrate; the pixel array includes a plurality of pixel units arranged in an array and a plurality of pixel electrodes, and each of the plurality of pixel units includes at least one of the plurality of pixel electrodes; the auxiliary conductive structure surrounds at least one of the plurality of pixel electrodes and is insulated from the plurality of pixel electrodes; a resistivity of a material of the auxiliary conductive structure is less than or equal to a resistivity of a material of the at least one of the plurality of the pixel electrodes.

First claim

What is claimed is:

1. An array substrate, comprising:
a base substrate, a pixel array and an auxiliary conductive structure which are on the base substrate, wherein
the pixel array comprises a plurality of pixel units distributed in an array and a plurality of pixel electrodes, and each of the plurality of pixel units comprises at least one of the plurality of pixel electrodes;
the auxiliary conductive structure surrounds at least one of the plurality of pixel electrodes and is insulated from the plurality of pixel electrodes;
the array substrate further comprises: a plurality of gate lines and a plurality of data lines, provided on the base substrate and crossing each other to define the plurality of pixel units;
the auxiliary conductive structure comprises a plurality of strip portions respectively extending along an extension direction of the plurality of data lines and an extension direction of the plurality of gate lines;
the plurality of strip portions of the auxiliary conductive structure overlap at least a part of the plurality of gate lines and/or overlap at least a part of the plurality of data lines in a direction perpendicular to the base substrate;
the array substrate further comprises a common electrode in a layer different from a layer where the plurality of pixel electrodes are located;
at least one strip portion among the plurality of strip portions of the auxiliary conductive structure comprises a plurality of hollow regions which are spaced apart from each other and penetrate through the at least one strip portion; and
each of the plurality of hollow regions overlaps at least a part of at least one of the plurality of gate lines, the plurality of data lines and the common electrode in the direction perpendicular to the base substrate.

2. The array substrate according to claim 1 , wherein a material of the auxiliary conductive structure has a resistivity less than or equal to a resistivity of a material of the at least one, surrounded by the auxiliary conductive structure, of the plurality of pixel electrodes.

3. The array substrate according to claim 1 , wherein the auxiliary conductive structure and the plurality of pixel electrodes are in a same layer.

4. The array substrate according to claim 1 , wherein a planar shape, viewed in a direction perpendicular to the base substrate, of the auxiliary conductive structure comprises a closed loop surrounding the at least one of the plurality of pixel electrodes.

5. The array substrate according to claim 4 , wherein
the plurality of pixel units comprise a first pixel unit and a second pixel unit which are adjacent to each other;
each of the first pixel unit and the second pixel unit comprises a first pixel electrode and a second pixel electrode of the plurality of pixel electrodes;
the planar shape of the auxiliary conductive structure comprises the closed loop surrounding the second pixel electrode in the first pixel unit and the first pixel electrode in the second pixel unit.

6. The array substrate according to claim 1 , wherein
distances between adjacent hollow regions among the plurality of hollow regions are equal; and
a width of each of the plurality of hollow regions is smaller than a width of the at least one strip portion in a direction perpendicular to an extension direction of the at least one strip portion.

7. The array substrate according to claim 1 , wherein
each of the plurality of pixel units further comprises a thin film transistor connected with the at least one of the plurality of pixel electrodes;
the auxiliary conductive structure covers at least a part of the thin film transistor.

8. The array substrate according to claim 7 , wherein
the plurality of strip portions of the auxiliary conductive structure comprise:
first strip portions extending along the extension direction of the plurality of gate lines; and
second strip portions extending along the extension direction of the plurality of data lines;
wherein a width of each first strip portion in a direction perpendicular to an extension direction of the first strip portions is greater than a width of each second strip portion in a direction perpendicular to an extension direction of the second strip portions.

9. The array substrate according to claim 8 , wherein
distances from one of the first strip portions to two of the plurality of pixel electrodes adjacent to the one of the first strip portions are not equal; and
distances from one of the second strip portions to two of the plurality of pixel electrodes adjacent to the one of the second strip portions are not equal; and
distances from two adjacent ones of the first strip portions to a same one of the plurality of pixel electrodes between the two adjacent ones of the first strip portions are not equal; and
distances from two adjacent ones of the second strip portions to a same one of the plurality of pixel electrodes between the two adjacent ones of the second strip portions are not equal.

10. The array substrate according to claim 7 , wherein
at least one pixel unit among the plurality of pixel units comprises an end position, an intermediate position, and a start position close to the thin film transistor, wherein the end position is away from the start position in an extension direction of at least one strip portion among the plurality of strip portions of the auxiliary conductive structure, and the intermediate position is at a midpoint of a connecting line between the start position and the end position;
the at least one strip portion comprises a first portion extending from the start position of the at least one pixel unit to the intermediate position of the at least one pixel unit and a second portion extending from the intermediate position of the at least one pixel unit to the end position of the at least one pixel unit, the first portion has a first width in a direction perpendicular to the extension direction of the at least one strip portion, the second portion has a second width in the direction perpendicular to the extension direction of the at least one strip portion, and the first width is greater than the second width; or, the at least one strip portion comprises a first portion, a second portion and a third portion which extend and are sequentially arranged in a direction from the start position of the at least one pixel unit to the end position of the at least one pixel unit, and a width of the first portion in the direction perpendicular to the extension direction of the at least one strip portion, a width of the second portion in the direction perpendicular to the extension direction of the at least one strip portion and a width of the third portion in the direction perpendicular to the extension direction of the at least one strip portion are sequentially decreased; or, the at least one strip portion comprises a plurality of portions which extend and are sequentially arranged in the direction from the start position of the at least one pixel unit to the end position of the at least one pixel unit, a total number of the plurality of portions is more than three, and widths, in the direction perpendicular to the extension direction of the at least one strip portion, of the plurality of portions are sequentially decreased.

11. The array substrate according to claim 1 , further comprising:
a shield component between adjacent ones of the plurality of pixel units; and
a color filter film array comprising a plurality of color filter films, wherein each of the plurality of pixel units comprises one of the plurality of color filter films;
wherein the plurality of strip portions of the auxiliary conductive structure overlap the shield component in a direction perpend

Assignees

• Boe Technology Group Co Ltd

Inventors

• Xian Jianbo
• Cheng Hongfei
• Xu Jian
• Qiao Yong

Classifications

• G02F1/133512

  Light shielding layers, e.g. black matrix (G02F1/136209 takes precedence) · CPC title

• G02F1/136204

  Arrangements to prevent high voltage or static electricity failures · CPC title

• G02F2201/40

  Arrangements for improving the aperture ratio · CPC title

• G02F1/136222

  Colour filters incorporated in the active matrix substrate · CPC title

• G02F1/136218

  Shield electrodes · CPC title