Cabled module for adding memory devices to a system

US11510333B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11510333-B2
Application numberUS-202016839797-A
CountryUS
Kind codeB2
Filing dateApr 3, 2020
Priority dateApr 3, 2020
Publication dateNov 22, 2022
Grant dateNov 22, 2022

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A module, comprising: a printed circuit board (PCB); a power and management connector disposed on the PCB to connect to a computing device via a first cable; a data connector disposed on the PCB to connect to the computing device via a second cable; and a memory slot, to accept a memory device, disposed on the PCB and connected to the power and management connector and the data connector.

First claim

Opening claim text (preview).

What is claimed is: 1. A system comprising a plurality of modules inserted into a sled, wherein the sled includes a power and management PCB to connect to power and management connectors of the plurality of modules and allow connection to a computing device via a first cable, and wherein each respective module comprises: a respective printed circuit board (PCB); a respective power and management connector disposed on the PCB to connect to the power and management PCB; a respective data connector disposed on the PCB to connect to the computing device via a second cable; and a respective memory slot, to accept a memory device, disposed on the PCB and connected to the power and management connector and the data connector. 2. The system of claim 1 , wherein each respective module includes a plurality of memory slots. 3. The system of claim 1 , wherein the respective memory slot is a differential dual in-line memory module (DDIMM). 4. The system of claim 1 , wherein the respective PCB includes apertures to allow for physical connection to a chassis or the sled. 5. The system of claim 1 , wherein each respective module further comprises a power and management slot disposed on the respective PCB. 6. The system of claim 5 , wherein the power and management slot accepts a power and management connector of another module. 7. The system of claim 6 , wherein the power and management slot indicates a position of a respective module. 8. The system of claim 1 , wherein the each respective module is hot swappable. 9. The system of claim 1 , wherein the each respective module is hot pluggable. 10. The system of claim 1 , wherein the sled comprises: a base; physical connections, disposed on a top of the base, to allow for the plurality of modules to be attached to a top side of the base of the sled; and connectors on a bottom side of the base to attach to the computing device. 11. The system of claim 10 , wherein the sled accepts the plurality of modules in a configuration in which memory devices of a first module are aligned on a different plane than memory devices of a second module, wherein the first module and the second module are adjacent and on a same side of the sled. 12. The system of claim 10 , wherein the sled includes a data PCB to connect to data connectors of the plurality of modules and allow connection to the computing device via a third cable, wherein the data PCB includes at least one of a switch, a controller, a memory controller, and a coherency controller. 13. The system of claim 10 , wherein the plurality of modules directly attach to the computing device via a fourth cable. 14. The system of claim 1 , wherein the respective module further comprises circuitry between the respective power and management connector and the respective memory slot, wherein the circuitry generates management signals to be sent to the computing device. 15. The system of claim 14 , wherein the management signals comprise: a location of the respective module as its position in the sled with other modules of the plurality of modules; a first number of a plurality of memory slots disposed on the PCB; and a second number of the first number of the memory slots which are populated with a corresponding memory device. 16. The system of claim 14 , wherein the power and management PCB includes an interface, wherein the circuitry of the respective module drives the management signals, via the interface, to a controller or a BMC on the computing device. 17. The system of claim 16 , wherein the interface comprises at least one of an Inter-Integrated Circuit (I2C) interface and a System Management Bus (SMBus) interface. 18. The system of claim 1 , wherein the respective module further comprises a back-up power source between the respective power and management connector and the respective memory slot. 19. The system of claim 18 , wherein the back-up power source is to provide power to the respective memory slot in the event of a power failure for an amount of time sufficient for the memory device inserted in the respective memory slot to send data to a non-volatile memory device.

Assignees

Inventors

Classifications

  • Memory · CPC title

  • Disposition of storage elements, e.g. in the form of a matrix array · CPC title

  • Non-printed connector · CPC title

  • H05K7/1487Primary

    Blade assemblies, e.g. blade cases or inner arrangements within a blade · CPC title

  • Power supply means, e.g. regulation thereof (for memories G11C) · CPC title

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Frequently asked questions

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What does patent US11510333B2 cover?
A module, comprising: a printed circuit board (PCB); a power and management connector disposed on the PCB to connect to a computing device via a first cable; a data connector disposed on the PCB to connect to the computing device via a second cable; and a memory slot, to accept a memory device, disposed on the PCB and connected to the power and management connector and the data connector.
Who is the assignee on this patent?
Hewlett Packard Entpr Dev Lp
What technology area does this patent fall under?
Primary CPC classification H05K7/1487. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 22 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).